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AssigneeFujitsu Limited
InventorsMasahiro Ito, Nobuhiko Isato
Estimating the term…
A memory device connected to a host computer is disclosed wherein when a power consumption reducing function is performed, the power consumption can be further reduced. The memory device includes a memory medium, a data read/write circuit, a power circuit, an electric power processing IC, an interface circuit, and an MPU. The interface circuit is connected to the portion of the power circuit on the upstream side of the electric power processing IC. The circuits including the MPU are connected to the portion of the power circuit on the downstream side of the electric power processing IC. The interface circuit is provided with a sleep signal generating circuit which generates a sleep signal which is sent to the power processing IC to stop the power supply to the downstream side of the power processing IC when a specific instruction signal is supplied from the host computer. Thus, the power consumption of the memory device can be remarkably reduced. The supply of the sleep signal is stopped immediately after an optical disc or the like is inserted in the drive.
A memory device connected to a host computer and comprising a memory medium, a data read/write circuit including a data read/write mechanism to read and write data from and onto a recording medium, a power circuit, an electric power processing IC provided in the power circuit, an interface circuit provided at a connection to the host computer, and a micro-processor unit which controls the operation of the memory device, wherein;
Dependencies are inferred from the claim text.