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US 5,798,557 AGranted
Lid wafer bond packaging and micromachining
AssigneeHarris Corporation
InventorsMatthew M. Salatino, William R. Young, Patrick A. Begley
Life of this patent
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Abstract
A wafer level hermetically packaged integrated circuit has a protective cover wafer bonded to a semiconductor device substrate wafer. The substrate wafer may contain a cavity. The cover wafer seals integrated circuits and other devices including but not limited to air bridge structures, resonant beams, surface acoustic wave (SAW) devices, trimmable resistors, and micromachines. Some devices, such as SAWs, are formed on the surface of cavities formed in the protective cover wafer. Die are separated to complete the process.
Claims16
A packaged integrated circuit comprising:
- a semiconductor substrate comprising a first portion and a second portion on one side of the substrate;
- at least one device formed therein on said first portion;
- a protective cover bonded to the first portion semiconductor device substrate for sealing and covering the at least one device formed herein;
- and
- at least one electrical bond pad on the second portion of the semiconductor substrate, each said bond pad located outside the protective cover and electrically connected to the device in the semiconductor substrate.
2 more elements
Dependencies are inferred from the claim text.