Method of automatically generating dummy metals for multilevel interconnection

A method of forming a metal pattern for use in an integrated circuit device fabrication process, the metal pattern including metal lines having an length and width, the method comprising:

• providing a first pattern having first lines corresponding to the metal lines, the first lines having a length and width larger by a first distance b than the length and width of corresponding metal lines;
• providing an inverse of the first pattern;
• providing a block array pattern having a plurality of dummy lines, each with a length f, a width d, and a spacing e, between adjacent dummy lines;
• providing a second pattern of second lines having a length and width by ANDing the block array pattern and the inverse of the first pattern;
• providing a third pattern having third lines corresponding to the second lines of the second pattern, the third lines having a height and width larger by a second distance c than the length and width of corresponding second lines;
• and
• forming the metal pattern by ORing the metal lines with the third pattern.