Architecture for an expandable transaction-based switching bus
AssigneeCisco Technology, Inc.
InventorsMario Mazzola, Tom Edsall, Massimo Prati, Luca Cafiero
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Abstract
A switching bus architecture enables efficient transfer of data within a network switch having a plurality of ports interconnected by a high-performance switching bus. The architecture is preferably implemented as novel port interface and forwarding engine circuitry that cooperate to efficiently transmit data to, and receive data from, the switching bus in accordance with a 2-tier arbitration policy that ensures adequate port access to the bus. As a result of such a cooperating arrangement, the architecture improves the transfer efficiency of the switch by providing all ports sufficient bus access to convey accurate data throughout the switch.
Claims21
A switching bus architecture for transferring data within a network switch having a plurality of ports contained on a plurality of cards interconnected by a switching bus, the architecture comprising:
- a plurality of port interface circuits for passing data to and from the switching bus, each port interface circuit controlling an associated port and appending a header portion to the data passed through the port to the bus;
- a forwarding engine cooperating with the port interface circuits to generate a unique index for translation to a port select signal in response to the header portion of the data, the port select signal selecting a port as a destination for the data transferred over the bus;
- and
- a multi-level arbitration mechanism that ensures each port adequate access to transfer data over the bus, the multi-level mechanism comprising a local arbiter contained on each card for aggregating bus requests generated by said port interface circuits on behalf of the ports contained on the card and a central arbiter for aggregating bus requests generated by each local arbiter on behalf of each of the cards.
A network switch for transferring data between a plurality of network entities, the switch comprising:
- A. a switching bus;
- B. at least one card connected to said switching bus, each card comprising
- B1. a plurality of port interface circuits, each uniquely associated with one of the plurality of network entities for receiving data from the network entity and issuing a bus request signal when it desires access to said switching bus;
- B2. a local arbiter, responsive to said plurality of bus request signals, for issuing a slot request signal when at least one of said port interface circuits requests said switching bus, and for arbitrating which of said port interface circuits shall be granted access to said switching bus when said card is granted access;
- C. a supervisor card interconnected to said switching bus and comprising
- C1. a central arbiter, responsive to said slot request signals, for determining which of said cards to grant access to said switching bus, and for providing a grant message signal over said switching bus to said cards indicating which of said cards is granted access to said switching bus, wherein said local arbiter determines which of said port interface circuits on the selected card is granted access to said switching bus in response to said grant signal;
- and
- C2. a forwarding engine circuit which receives a data frame on said switching bus from said port interface circuit currently accessing said switching bus, and determines the destination of said data frame based upon a destination address within said data frame, and transmits said data frame over said switching bus to said plurality of port interface circuits associated with said destination address.
A network switch for transferring data between a plurality of network entities, the switch comprising:
- A. a switching bus;
- B. a plurality of port interface circuits, each uniquely associated with one of the plurality of network entities, each interface circuit comprising
- a first interface for receiving data from and transmitting data to its associated network entity;
- a second interface for receiving data from said switching bus, and for transmitting data onto said switching bus in response to a bus access granted signal;
- means for generating and providing a bus request signal when access to said switching bus is desired;
- C. a supervisor card interconnected to said switching bus, comprising
- means responsive to said bus request signals, for generating a bus access granted signal indicative of which of said plurality of port interface circuits may initiate transmission of data onto said switching bus;
- a forwarding engine circuit which receives a data frame on said switching bus from said port interface circuit which has access to said switching bus, determines the destination of said data frame based upon a frame destination address within said data frame, and transmits a command signal over said switching bus instructing said plurality of port interface circuits which are not the intended destination of said data frame to disregard said data frame.
A method of transmitting information within a network switch between first port interface circuit, a forwarding engine and a plurality of second port interface circuits interconnected by a switching bus, the method comprising the steps of:
- at the first port interface circuit, transmitting a data frame having a destination address onto the switching bus;
- receiving the data frame at the forwarding engine and at the plurality of second port interface circuits, such that:
- at the forwarding engine, generating a unique index value in response to the destination address, translating the unique index value to port select signals and transmitting the port select signals to the plurality of second port interface circuits;
- and
- at the plurality of second port interface circuits, one of retaining the data frame in response to receiving an asserted port select signal and discarding the data frame in response to receiving a non-asserted port select signal.
A switching bus architecture that facilitates transfer of data within a network switch having a plurality of ports contained on cards interconnected by a switching bus, the architecture comprising:
- a plurality of port interface circuits that pass data to and from the switching bus, each port interface circuit controlling an associated port and appending a header portion to the data passed through the port to the bus;
- and
- a forwarding engine cooperating with the port interface circuits to generate a unique index for translation to a port select signal in response to the header portion of the data, the port select signal selecting a port of a card as a destination for the data transferred over the bus.
Dependencies are inferred from the claim text.