Free loop interval timer and modulator
AssigneeXLI Corporation
InventorAdam L. Carley
Life of this patent
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Abstract
A free loop oscillator system including a set of successive delay elements connected in series forming a free-running loop oscillator, a set of taps disposed between the delay elements, a circuit for determining the speed of the free-running loop oscillator, and circuit for choosing a given tap in response to the speed of the free-running loop oscillator. Such a system may be implemented as a part of interval timer, a printer controller, a frequency synthesizer, an FM modulator, a digital-to-analog converter, or any other device which requires the availability of finely addressable signals since the taps disposed between the delay elements present signals much finer than any presently available clock.
Claims16
A free loop modulator comprising:
- a set of successive delay means connected in series forming a free running loop oscillator;
- a set of successive taps disposed between the delay means, each tap providing a differently phased oscillator signal;
- means for defining a desired time of an signal transition;
- means for determining which tap signal contains a transition proximate the desired time;
- and
- means for selecting the tap signal which contains a transition proximate the desired time.
A free loop modulator comprising:
- a set of successive delay means connected in series forming a free running loop oscillator;
- a set of successive taps disposed between the delay means, each tap providing a differently phased oscillator signal;
- means for latching the state of each tap;
- means for defining a desired time of a signal transition;
- means for determining which tap signal contains a transition proximate the desired time;
- means for selecting the tap signal which contains a transition proximate the desired time;
- and
- means, responsive to the means for latching, for determining the speed of the oscillator.
A free loop modulator comprising:
- a set of successive delay means connected in series forming a free running loop oscillator;
- a set of successive taps disposed between the delay means, each tap providing a differently phased oscillator signal;
- means for counting each lap of said oscillator;
- means for latching the state of each tap including two latches for separately latching the lap count on the positive and negative transitions of one selected tap;
- means for defining a desired time of a signal transition;
- means for determining which tap signal contains a transition proximate the desired time;
- and
- means for selecting the tap signal which contains a transition proximate the desired time.
Dependencies are inferred from the claim text.