Method for fabricating microbump interconnect for bare semiconductor dice

A method for fabricating an interconnect for testing semiconductor dice comprising:

• providing a substrate comprising silicon;
• forming an electrically insulating first layer on the substrate;
• forming a plurality of conductors on the first layer;
• forming a second layer on the conductors and on the first layer, the second layer comprising a polymeric material;
• forming a plurality of vias through the second layer to the conductors, the vias having a pattern matching that of pads on a semiconductor die;
• electrolessly depositing metal microbumps in the vias in electrical communication with the conductors, the microbumps configured to electrically engage the pads on the die and to flex with the second layer to accommodate dimensional variations in the pads or the microbumps.

A method for fabricating an interconnect for testing semiconductor dice comprising:

• providing a substrate comprising silicon;
• forming an electrically insulating first layer on the substrate;
• forming a plurality of conductors on the first layer;
• forming a second layer on the conductors and on the first layer, the second layer comprising a polymeric material;
• forming a plurality of vias through the compliant layer to the conductors in a pattern matching that of pads on a semiconductor die;
• screen printing metal microbumps in the vias in electrical communication with the conductors, the microbumps configured to electrically engage the pads on the die and to flex with the second layer to accommodate dimensional variations in the pads or the microbumps.

A method for fabricating an interconnect for testing semiconductor dice comprising:

• providing a substrate comprising silicon, the substrate configured for placement in a test apparatus adapted to contain a semiconductor die for testing;
• forming an electrically insulating first layer on the substrate;
• forming a plurality of conductors on the first layer;
• forming a second layer on the conductors and on the first layer, the second layer comprising a polymeric material;
• forming a first pattern of vias through the second layer to the conductors, the first pattern matching a second pattern of pads on the die;
• forming a plurality of metal microbumps in the vias;
• and
• placing the interconnect in the test apparatus such that the second layer and the microbumps can flex upon contact with the pads in a Z-direction to accommodate dimensional variations in the pads or in the microbumps.