Coded signal decoding circuit, and synchronous control method for the same, synchronous detecting method, and synchronization detecting circuit therefor

A coded-signal decoding circuit for processing a bit stream consisting of a plurality of successive frames each including sample data of a coded signal to be decoded, and header information having synchronous information indicating a starting position of a frame as a unit of processing and information indicating the frame as a first kind of frame consisting of a relatively small number of sample data per frame or a second kind of frame consisting of a relatively large number of sample data per frame, comprising:

• decoding means for decoding the sample data in each frame of said bit stream;
• header information extracting means for extracting the header information from each frame in the bit stream;
• synchronous state holding means for holding information indicating a synchronized state or an asynchronous state, and a transition state therebetween, and for outputting a state signal indicating the state;
• synchronous detecting means for detecting whether the state is the synchronized state or the asynchronous state on the basis of the synchronous information included in the header information extracted by the header information extracting means, and for outputting the detection result as a synchronous detecting signal;
• judging means for judging whether the frame is said first kind or said second kind on the basis of the header information extracted by said header information extracting means;
• synchronous state controlling means for, based on the judgment result by said judging means, the synchronous detecting signal outputted from said synchronous detecting means, and the state signal outputted from said synchronous state holding means, judging at least whether the next state is a first state indicating an initial state or indicating that the synchronized state has not been detected, a second state indicating that the synchronized state has been detected, a third state indicating that the synchronized state has not been detected in the second state when the contents of said header information indicates the frame is said first kind of frame, or a fourth state indicating that the synchronized state has not been detected in the second state when the contents of said header information indicates the frame is said second kind of frame, and for making said synchronous state holding means hold the judgment result;
• storing means, whose stored contents are initialized in the asynchronous state, and which has a storage capacity at least corresponding to the number of sample data of the second kind of frame, for storing decoded signals obtained by said decoding means and for outputting the decoded signals at predetermined timing;
• initial data generating means for generating data which makes the stored contents of the storing means be an initial state;
• and
• storing means initializing means for storing the data generated by the initial data generating means instead of an output of said decoding means, when said judging means has judged that the frame currently being processed is said first kind, and said synchronous state holding means has detected said third state or said fourth state, or when said judging means has judged that the frame currently being processed is said second kind, and said synchronous state holding means has detected said fourth state.

A synchronous control method for a coded-signal decoding circuit for processing a bit stream consisting of a plurality of successive frames each including sample data of a coded signal to be decoded, and header information having synchronous information indicating a starting position of a frame as a unit of processing and information indicating the frame as a first kind of frame consisting of a relatively small number of sample data per frame or a second kind of frame consisting of a relatively large number of sample data per frame, comprising the steps of:

• extracting the header information from each frame in said bit stream;
• detecting whether the state is a synchronized state or an asynchronous state on the basis of the synchronous information included in the extracted header information;
• judging whether the frame is said first kind or said second kind on the basis of the extracted header information;
• and
• performing synchronous control, based on the judgment result on the kind of frame, the synchronous detection result, and the current state, by judging at least whether the next state is a first state indicating an initial state or indicating that the synchronized state has not been detected, a second state indicating that the synchronized state has been detected, a third state indicating that the synchronized state has not been detected in said second state when the contents of said header information indicates the frame is said first kind, or a fourth state indicating that the synchronized state has not been detected in said second state when the contents of said header information indicates the frame is said second kind.