Method and apparatus for translating digital data into an analog signal

A pulse width modulation method for translating digital data into an analog signal, said method comprising the steps of:

• (a) obtaining a digital input word and a digital count word, said digital count word having at least a first bit and a second bit, said first bit being of higher significance relative to said second bit, wherein said digital input word has (N+1) bits, and said digital count word has N bits;
• (b) reversing the relative order of significance of said first and second bits to produce a reversed order count word;
• (c) isolating the most significant bit (MSB) of said digital input word;
• (d) generating a first analog value for an output when the magnitude of said digital input word is greater than the magnitude of said reversed order count word;
• (e) generating a second analog value for said output when the magnitude of said digital input word is not greater than the magnitude of said reversed order count word;
• and (f) providing said output at one of a plurality of points in response to said MSB.

A pulse width modulation method for translating digital data into an analog signal, said method comprising the steps of:

• (a) sequentially counting from a first digital value to a last digital value during a count cycle;
• (b) obtaining a digital input word configured to indicate a duty cycle and a plurality of digital count words, each of said digital count words having a plurality of bits;
• (c) separating each of said digital count word bits into a first word and a second word, wherein said first word has at least two bits;
• (d) reversing, for each of said digital count words, the relative order of significance of at least two of said digital count word bits to produce a plurality of reversed order count words;
• (e) comparing the magnitude of each of said reversed order count words to the magnitude of said digital input word;
• (f) producing an output in response to said comparing step (e), said output approximately having said duty cycle and said output including a number of pulses distributed substantially evenly in time during said count cycle;
• (g) providing said output when the magnitude of said second word equals a predetermined value;
• and
• (h) withholding said output when said magnitude of said second word differs from said predetermined value.

A pulse width modulation method for translating digital data into an analog signal, said method comprising the steps of:

• (a) sequentially counting from a first digital value to a last digital value during a count cycle;
• (b) obtaining a digital input word configured to indicate a duty cycle and a plurality of digital count words, wherein said digital input word has (N+1) bits, and each of said digital count words has N bits;
• (c) reversing, for each of said digital count words, the relative order of significance of at least two of said digital count word bits to produce a plurality of reversed order count words;
• (d) comparing the magnitude of each of said reversed order count words to the magnitude of said digital input word;
• (e) isolating the most significant bit (MSB) of said digital input word;
• (f) producing an output in response to said comparing step (d), said output approximately having said duty cycle, and said output including a number of pulses distributed substantially evenly in time during said count cycle;
• and
• (g) providing said output at one of a plurality of points in response to said MSB.

A pulse width modulation circuit that translates digital data into an analog signal, said circuit comprising:

• a digital counter configured to produce a plurality of digital count words, each of said digital count words having a plurality of bits;
• means for reversing the relative order of significance of at least two of said digital count word bits to produce a corresponding plurality of reversed order count words, said means for reversing being coupled to said digital counter;
• a comparator circuit coupled to said means for reversing, said comparator circuit being configured to compare the magnitude of each of said reversed order count words to the magnitude of a digital input word that indicates a duty cycle;
• means for producing an output approximately having said duty cycle;
• a selection circuit coupled to said means for producing, wherein:
• said digital input word has (N+1) bits and each of said digital count words has N bits;
• and
• said selection circuit is configured to provide said output at one of a plurality of points in response to the most significant bit (MSB) of said digital input word.

A pulse width modulation circuit that translates digital data into an analog signal, said circuit comprising:

• a digital counter configured to produce a plurality of digital count words, each of said digital count words having a plurality of bits;
• means for reversing the relative order of significance of at least two of said digital count word bits to produce a corresponding plurality of reversed order count words, said means for reversing being coupled to said digital counter;
• a comparator circuit coupled to said means for reversing, said comparator circuit being configured to compare the magnitude of each of said reversed order count words to the magnitude of a digital input word that indicates a duty cycle;
• means for producing an output approximately having said duty cycle;
• measn for separating each of said digital count words into a first word and a second word, wherein said first word has at least two bits and the relative order of significance of said first word is reversed by said means for reversing;
• a magnitude detector coupled to said means for seperating and configured to receive said second word;
• and
• a control circuit configured to provide said output when the magnitude of said second word equals a predetermined value, and to withhold said output when the magnitude of said second word differs from said predetermined value.