High performance, low thermal loss, bi-temperature superconductive device

A superconductive electrical device operable simultaneously at a relatively higher temperature and at a relatively lower temperature differing by at least 20.degree. K, the device comprising:

• (a) a non-superconducting substrate having a first relatively higher temperature region and a second relatively lower temperature region;
• (b) a first superconductive layer on the first region and on a portion of the second region of the substrate, the first layer being superconductive at the relatively higher temperature;
• (c) a dielectric layer on the first superconductive layer;
• and
• (d) a second superconductive layer on the second region of the substrate and on a portion of the dielectric layer, the second layer being superconductive at the relatively lower temperature but not at the relatively higher temperature,
• wherein the first and second regions are connected by an intermediate region, the cross-sectional area of the intermediate region being at least 20% less than the cross-sectional area of the first region.

A superconductive electrical device operable simultaneously at a relatively higher temperature and at a relatively lower temperature differing by at least 20.degree. K, the device comprising:

• (a) a non-superconducting substrate having a first relatively higher temperature region and a second relatively lower temperature region;
• (b) a first superconductive layer on the first region and on a portion of the second region of the substrate, the first layer being superconductive at the relatively higher temperature;
• (c) a dielectric layer on the first superconductive layer;
• and
• (d) a second superconductive layer on the second region of the substrate and on a portion of the dielectric layer, the second layer being superconductive at the relatively lower temperature but not at the relatively higher temperature,
• wherein the first and second regions are connected by an intermediate region, the cross-sectional area of the intermediate region being at least 20% less than the cross-sectional area of the second region.

A superconductive electrical device operable simultaneously at a relatively higher temperature and at a relatively lower temperature differing by at least 20.degree. K, the device comprising:

• (a) a ceramic substrate having a first relatively higher temperature region and a second relatively lower temperature region;
• (b) a first high temperature superconductive layer on the first region and on a portion of the second region of the substrate, the first layer being superconductive at the relatively higher temperature;
• (c) a dielectric layer on the first superconductive layer;
• (d) a second low temperature superconductive layer on the second region of the substrate and on a portion of the dielectric layer, the second layer being superconductive at the relatively lower temperature and being non-superconductive at the relatively higher temperature;
• (e) securing means for securing at least one integrated circuit chip on at least one of the superconductive layers;
• and
• (f) an integrated circuit chip secured to at least one of the layers by the securing means.

A superconductive electrical device operable simultaneously at a relatively higher temperature and at a relatively lower temperature differing by at least 20.degree. K, the device comprising:

• (a) a non-superconductive substrate having a first relatively higher temperature region and a second relatively lower temperature region;
• (b) at least one bilayer on the first region and on a portion of the second region of the substrate, the bilayer comprising a lower first superconductive layer and an upper non-superconductive layer, the first layer being superconductive at the relatively higher temperature;
• and
• (c) a second superconductive layer on the second region of the substrate and on a portion of the outermost bilayer, the second layer being superconductive at the relatively lower temperature but not at the relatively higher temperature.

A superconductive electrical device operable simultaneously at a relatively higher temperature and at a relatively lower temperature differing by at least 20.degree. K, the device comprising:

• (a) a non-superconductive substrate having a first relatively higher temperature region and a second relatively lower temperature region;
• (b) at least one bilayer on the first region and on a portion of the second region of the substrate, the bilayer comprising a lower first superconductive layer and an upper non-superconductive layer, the first layer being superconductive at the relatively higher temperature;
• and
• (c) a second superconductive layer on the second region of the substrate and on a portion of the outermost bilayer, the second layer being superconductive at the relatively lower temperature but not at the relatively higher temperature,
• wherein the first and second regions are connected by an intermediate region, the cross-sectional area of the intermediate region being at least 20% less than the cross-sectional area of the first region.

A superconductive electrical device operable simultaneously at a relatively higher temperature and at a relatively lower temperature differing by at least 20.degree. K, the device comprising:

• (a) a non-superconductive substrate having a first relatively higher temperature region and a second relatively lower temperature region;
• (b) at least one bilayer on the first region and on a portion of the second region of the substrate, the bilayer comprising a lower first superconductive layer and an upper non-superconductive layer, the first layer being superconductive at the relatively higher temperature;
• and
• (c) a second superconductive layer on the second region of the substrate and on a portion of the outermost bilayer, the second layer being superconductive at the relatively lower temperature but not at the relatively higher temperature,
• wherein the first and second regions are connected by an intermediate region, the cross-sectional area of the intermediate region being at least 20% less than the cross-sectional area of the second region.