Converter circuit arrangement

A converter circuit arrangement having at least one path with an even number of series-connected thyristors which can be turned off, and having reverse-parallel connected diodes which are connected in reverse-parallel with the thyristors, the path of each path being connected to a DC voltage source and a central, common node of the path or of each path forming a load connection, wherein

• a DC voltage source and a central, common node of the path or of each path forming a load connection, wherein
• the thyristors which can be turned off are hard driven, to be precise in such a manner that the ratio of an anode current I.sub.A to a maximum gate current I.sub.Gpeak, I.sub.A /I.sub.Gpeak is less than or equal to 1, and the gate current rises quickly in such a manner that I.sub.Gpeak is reached within a rise time tr of less than or equal to 2 .mu.s;
• a total inductance L.sub.G of the driven circuit of each thyristor is selected to be sufficiently small that L.sub.G .ltoreq.V.sub.GR /(I.sub.Gpeak /tr), V.sub.GR corresponding to a reverse blocking voltage of the gate;
• a freewheeling circuit is provided between the DC voltage source and the series circuit formed by the thyristors which can be turned off;
• and
• the reverse-parallel connected diodes have a reverse current response with a voltage/time differential dV/dt of 2 kV/.mu.s to 10 kV/.mu.s.