US 5,767,735 AGranted

Variable stage charge pump

AssigneeIntel Corporation

InventorsJahanshir J. Javanifard, Kerry D. Tedrow, Jin-Lien Lin, Jeffrey J. Evertt, Gregory E. Atwood

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Abstract

A variable stage charge pump for a flash memory device is described. The variable stage charge pump includes a first charge pump and a second charge pump. A first switch couples an output of the first charge pump to an input of the second charge pump. A second switch couples an input of the first charge pump to the input of the second charge pump. The first and second charge pumps are series-coupled to a common output node when the first switch is in a first position and the second switch is in a second position, wherein the first and second charge pumps are parallel-coupled to the common output node when the first switch is in the second position and the second switch is in the first position.

Claims4

Dependent claims

A variable stage charge pump comprising:

n charge pumps including a first charge pump and m other charge pumps;
m first switches, wherein each first switch couples an input of an associated one of the m charge pumps with an output of a preceding charge pump, wherein the first charge pump is the preceding charge pump for the first one of the m charge pumps;
m second switches, each second switch coupling the input of an associated one of the m charge pumps and an input of the first charge pump;
wherein the n charge pumps are series-coupled if all the first switches are in a first position and all the second switches are in a second position, wherein the n charge pumps are parallel-coupled if all the first switches are in a second position and all the second switches are in a first position.

1 more element

Dependencies are inferred from the claim text.

Facts

Application: 08/720,943Filed 3 Oct 1996 · division
Priority: 29 Sep 1995
Granted: 16 Jun 1998
Term ends: Not estimatedThe source records don’t support an estimate.

Classification7 codes

G11C 16/30
Auxiliary circuits, e.g. for writing into memory: power supply circuits
G11C 5/145
Power supply arrangements , e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels:…
H02M 3/07
Using resistors or capacitors, e.g. potential divider: using capacitors charged and discharged alternately by semiconductor devices with control…
H02M 1/007
Converter structures employing plural converter units, other than for parallel operation of the units on a single load: plural converter units in…