Method of optical lithography using phase shift masking
AssigneeAdvanced Micro Devices, Inc.
InventorChristopher A. Spence
Life of this patent
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Abstract
A method of performing poly level lithography in manufacturing an integrated circuit using a phase shift mask in a step and repeat optical tool where the phase assignment for said phase shift mask is determined by a technique which determines, without assignment conflict, the Intersection of the gate pattern with the active gate pattern and which divides the Intersection into categories of stacks where a slightly different phase assignment rules is employed for the different stacks.
Claims27
A method of forming a mask for a gate level of an integrated circuit, said method comprising the steps of:
- forming a gate level pattern on a mask substrate;
- identifying regions of the mask substrate which correspond to active regions of the integrated circuit and identifying one or more portions of the gate level pattern which overlap with the active regions of the integrated circuit;
- and
- forming phase shift regions having a phase difference of about 170.degree.-190.degree. on opposite sides of at least one identified portion.
A method of forming a mask for a gate level of an integrated circuit, said method comprising the steps of:
- identifying regions of a mask substrate which correspond to active regions of the integrated circuit and identifying one or more portions of a gate level pattern which overlap with the active regions of the integrated circuit;
- forming the gate level pattern on the mask substrate, the gate level pattern having a reduced width on at least one identified portion;
- and
- forming phase shift regions having a phase difference of about 170.degree.-190.degree. on opposite sides of said at least one identified portion.
A method of forming a mask for a gate level of an integrated circuit, said method comprising the steps of:
- forming a light-transmissive gate level pattern on an opaque mask substrate;
- identifying regions of the opaque mask substrate which correspond to active regions of the integrated circuit and identifying one or more portions of the gate level pattern which overlap with the active regions of the integrated circuit;
- and
- forming a phase shift region having a phase of about 170.degree.-190.degree. on at least one identified portion.
A mask for producing a gate level pattern on a substrate of an integrated circuit, comprising:
- a light-transmissive mask substrate;
- an opaque gate level pattern formed on the mask substrate;
- and
- phase shift regions of opposite phases formed on opposite sides of those portions of the opaque gate level pattern which overlap with active regions of the integrated circuit, but not necessarily on opposite sides of those portions of the opaque gate level pattern which do not overlap with active regions of the integrated circuit,
- wherein the width of the opaque gate level pattern at the overlapping portions are smaller than the width of the opaque gate level pattern at the non-overlapping portions.
A mask for producing a gate level pattern on a substrate of an integrated circuit, comprising:
- an opaque mask substrate;
- a light-transmissive gate level pattern formed on the opaque mask substrate;
- phase shift regions of opposite phases formed at those portions of the opaque gate level pattern which overlap with active regions of the integrated circuit;
- and
- transition phase shift regions formed on at least one end of the phase shift regions.
Dependencies are inferred from the claim text.