Bit error rate detection system

A system for calculating the bit error rate of a data channel in a SONET network to enable automatic protection switching in accordance with the SONET specification, comprising:

• establishing a threshold bit error rate and switch initiation time;
• monitoring a data stream using a sliding window averaging calculation in which:
• if the error rate is below the threshold bit error rate, the window length remains constant,
• if the error rate increases above the threshold bit error rate, the window decreases in length such that the window decreases to zero if the error rate exceeds the threshold level for a time period equal to or less than the switch initiation time;
• and
• generating a switch signal if the window length decreases to a minimum value.

A process for determining the bit error rate of a data stream within a time period, comprising:

• (a) selecting an allowable error;
• (b) selecting a sampling quantity of bits in the data stream;
• (c) monitoring the data stream for errors during the sampling;
• (d) comparing the allowable error to errors detected during the monitoring step;
• and
• (e) if the errors detected are greater than the allowable error, reducing the sampling quantity of bits, else increasing the sampling quantity of bits and returning to step (b).

A process operable in a network element having a control processor and configurable memory, the process for determining the bit error rate in a SONET data stream, the data stream comprising a plurality of frames having a common frame length, comprising the steps of:

• providing a denominator count register, a window length count register, a cumulative error register and a threshold register;
• inputting a denominator count value into the denominator count register;
• inputting an initial window count value into the window count register;
• inputting a bit error threshold into the threshold register;
• calculating for each frame T where T is an integer, a bit interleave parity (BIP) for frame T, the bit interleave parity reflecting the bit error rate;
• reading the BIP for frame T-1 transmitted in frame T;
• comparing, for a number of frames equalling the window length value multiplied by the denominator count value, the calculated BIP for frame T-1 with the actual received BIP for frame T-1;
• adding the errors which result from the step of comparing to the cumulative error register;
• querying the cumulative error register to determine if the cumulative number of errors equals the threshold register value;
• if the cumulative number of errors exceeds the threshold, then increasing the window length register value, if not, then decreasing the window length register;
• and
• generating an error signal if the window length equals zero.

A system memory coupled to a microprocessor, the memory including a plurality of memory registers and instructions for the microprocessor, the instructions comprising;

• selecting an allowable bit error rate;
• selecting a window length comprising a number of frames over which a sample of the bit error rate will be compared;
• comparing an actual bit interleave parity for frame T-1 carried in frame T to a previously calculated value for the frame T-1;
• storing any errors detected in the bit interleave parity between frames in a register;
• at the end of the window, comparing errors accumulated to the allowable bit error rate and
• if said errors accumulated exceed the allowable bit error rate, decreasing the window length;
• or
• if said errors accumulated do not exceed the allowable error rate, increasing the window length.

An automatic protection switching system for a SONET network, comprising:

• a control processor;
• a configurable memory operatively coupled to the control processor, having an integer multiple register, a window length register, a threshold register, and a cumulative error register configured therein;
• a multiplexer, coupled to the control processor, the multiplexer having coupled thereto a plurality of optical carriers;
• and
• program means for causing the processor to:
• read a bit interleave parity for a frame T-1 transmitted in frame T;
• window length value multiplied by a denominator count value, a bit interleave parity calculated for frame T-1 with a bit interleave parity received for frame T-1;
• add the errors which result from the step of comparing to the cumulative error register;
• query the cumulative error register to determine if a cumulative number of errors equals the threshold register value;
• if the cumulative number of errors exceeds the threshold, then increase the window length register value, if not, then decrease the window length register;
• and
• generate an error signal if the window length equals zero.