Digital-to-analog converter with dynamic matching and bit splitting

A digital-to-analog converter for converting a digital signal having N bits to an analog signal, comprising:

• a signal divider for receiving the digital signal and splitting it up into a number of G digital group signals with in total N bits;
• a number of G converter blocks coupled to said signal divider for receiving the digital group signals and converting them into analog group signals, adjacent converter blocks being coupled so that a first converter provides a reference value to a second converter;
• and
• a summation circuit coupled to said converter blocks for receiving the analog group signals and combining them into the analog signal.

A method for the conversion of a digital signal having N.sub.1 +N.sub.2 bits to an analog signal comprising the steps of:

• receiving the digital signal and splitting it up into a first digital group signal of N.sub.2 bits and a second digital group signal of N.sub.1 bits;
• converting the first digital group signal to a first analog group signal;
• converting the second digital group signal to a second analog group signal by using reference values which have been generated in the step of converting the first digital group signal;
• and
• combining the first and the second analog group signal to the analog signal.

A method for the conversion of a N bit digital signal to an analog signal comprising the steps of:

• receiving the digital signal and splitting it up into digital group signals, each digital group signal comprising a number of bits;
• converting each of the digital group signals to an analog group signal, thereby converting only a first digital group signal with dynamic matching to provide a reference signal which is used for converting a second digital group signal;
• and
• combining the analog group signals to form the analog signal.

An apparatus for converting a digital signal having most significant bits (MSB) and least significant bits (LSB) to a single analog signal, said apparatus comprising:

• a first array of switches for providing first currents, said first array of switches controlled by said MSB and by a dynamic matching circuit for providing a first analog intermediate signal and for providing a reference signal;
• a second array of switches for providing second currents, said second array of switches controlled by said LSB and receiving said reference signal for providing a second analog intermediate signal;
• and
• a combiner receiving said first and second analog intermediate signals and providing said single analog signal.