Method of manufacturing MOS-type semiconductor device having electrode structure capable of coping with short-channel effects

A method of manufacturing a semiconductor device, the method comprising the steps of:

• forming a gate oxide layer on a silicon substrate of n-type conductivity type;
• forming a first polysilicon layer, of n.sup.+ -type conductivity type to which a high concentration of phosphorus is added, at an intermediate position of a channel formation region of the silicon substrate on the gate oxide layer to form a first portion of a gate electrode, the first polysilicon layer having a first work function;
• forming an oxide layer by chemical vapor deposition (CVD) as an insulation layer on an upper surface of the first polysilicon layer to form a second portion of said gate electrode;
• forming a second polysilicon layer, of p.sup.+ -type conductivity type to which a high concentration of boron is added on side walls of the first polysilicon layer and the oxide layer to form a third portion of said gate electrode, the second polysilicon layer having a second work function larger than said first work function of the first polysilicon layer;
• and
• forming on both sides of the channel formation layer of the silicon substrate a p.sup.+ -type conductivity type impurity diffusion layer to which a high concentration of boron is added, to form source and drain regions so that said second polysilicon layer partially overlaps at least one of said source and drain regions.

A method of manufacturing a semiconductor device, the method comprising the steps of:

• forming a gate oxide layer on a silicon substrate of n-type conductivity type;
• forming a first polysilicon layer, of n.sup.+ -type conductivity type to which a high concentration of phosphorus is added, at an intermediate position of a channel formation region of the silicon substrate on the gate oxide layer to form a first portion of a gate electrode, the first polysilicon layer having a first work function;
• forming an oxide layer by chemical vapor deposition (CVD) as an insulation layer on an upper surface of the first polysilicon layer to form a second portion of said gate electrode;
• forming a second polysilicon layer, of p.sup.+ -type conductivity type to which a high concentration of boron is added on side walls of the first polysilicon layer and the oxide layer to form a third portion of said gate electrode, the second polysilicon layer having a second work function larger than said first work finction of the first polysilicon layer;
• and
• forming on both sides of the channel formation layer of the silicon substrate a p.sup.- -type conductivity type impurity diffusion layer to which a low concentration of boron is added, and forming, on both outer sides of the p.sup.- -type conductivity type impurity diffusion layers, a p.sup.- -type conductivity type impurity diffusion layer to which a high concentration of boron is added, to form a source region using a first pair of said p.sup.+ -type and p.sup.- -type impurity diffusion layers and a drain region using a second pair of said p.sup.+ -type and p.sup.- -type impurity diffusion layers so that said second polysilicon layer partially overlaps at least one of said p.sup.+ -type impurity diffusion layers of said source and drain regions.