Static-induction transistors having heterojunction gates and methods of forming same

An integrated silicon carbide switching device, comprising:

• a silicon carbide substrate having first and second opposing faces thereon;
• a silicon carbide drain region of first or second conductivity type in said silicon carbide substrate, adjacent the first face;
• a silicon carbide source region of first conductivity type in said silicon carbide substrate, adjacent the second face;
• a silicon carbide drift region of first conductivity type in said silicon carbide substrate said silicon carbide drift region extending between said silicon carbide source and drain regions;
• a plurality of spaced trenches in said silicon carbide substrate at the second face, said trenches having respective sidewalls extending adjacent said silicon carbide drift region;
• a nonmonocrystalline silicon gate region of second conductivity type in each of said plurality of spaced trenches, said nonmonocrystalline silicon gate regions forming respective P-N heterojunctions with said silicon carbide drift region at the sidewalls of said plurality of spaced trenches and comprising a material which is selected from the group consisting of amorphous silicon and polycrystalline silicon;
• source and drain electrodes ohmically contacting said source and drain regions, respectively;
• and
• a thermally grown silicon dioxide insulating region in each of said plurality of trenches, said thermally grown silicon dioxide regions extending between respective nonmonocrystalline silicon gate regions and said source electrode:
• wherein a potential barrier for second conductivity type charge carriers at the P-N heterojunctions is greater than a potential barrier for first conductivity type charge carriers by more than about 0.5 eV;
• and
• wherein said thermally grown silicon dioxide insulating region comprises second conductivity type dopants therein.

A silicon carbide static-induction transistor, comprising:

• a 4H or 6H monocrystalline silicon carbide substrate having first and second opposing faces thereon and containing therein a silicon carbide drain region of first or second conductivity type adjacent the first face, a silicon carbide source region of first conductivity type adjacent the second face and a silicon carbide drift region of first conductivity type between said source and drain regions, said drift region having a lower first conductivity type doping concentration therein than said source region;
• a trench in said silicon carbide substrate at the second face, said trench having a sidewall extending adjacent said drift region;
• and
• a gate region of second conductivity type in said trench, said gate region comprising 3C nonmonocrystalline silicon carbide and forming a P-N junction with said drift region at the sidewall of said trench.