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US 5,744,375 AGranted
Capped anneal
AssigneeTexas Instruments Incorporated
InventorsYung-Chung Kao, Donald L. Plumton
Life of this patent
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Abstract
Heteroepitaxy of lattice-mismatched semiconductor materials such as GaAs on silicon is accomplished by first growing GaAs (104) on silicon (102), then growing a lattice matched cap of Al.sub.z Ga.sub.1-z,As (106), next annealing out defects with the Al.sub.z Ga.sub.1-z As cap (106) limiting desorption of gallium, lastly growing further GaAs (110) directly on the cap. The lattice matched cap is also used as an implant anneal cap.
Claims8
A method of annealing a semiconductor layer, comprising the steps of:
- (a) forming an epitaxial cap layer over said semiconductor layer, said semiconductor layer comprising a compound semiconductor material having constituent elements in a proportion according to Al.sub.x Ga.sub.1-x As, and said cap layer comprising a compound semiconductor material having said constituent elements in a proportion according to Al.sub.y Ga.sub.1-y As, wherein y>x and x>o
- (b) heating said cap layer and said semiconductor layer;
- and
- (c) removing said cap layer after said heating step.
1 more element
A method for fabricating a semiconductor device, comprising the steps of:
- (a) forming a device layer comprising a compound semiconductor material having constituent elements in a proportion according to Al.sub.x Ga.sub.1-x As;
- (b) forming an epitaxial cap layer over said device layer, said cap layer comprising a compound semiconductor material having constituent elements in a proportion according to Al.sub.y Ga.sub.1-y As, wherein y>x and x>o;
- (c) implanting dopants through said cap layer into said device layer to form a doped region;
- (d) heating said cap layer and said device layer;
- (e) removing said cap layer;
- and
- (f) forming a metal contact on said doped region.
4 more elements
Dependencies are inferred from the claim text.