US 5,739,573 AGranted

Semiconductor device with improved salicide structure and a method of manufacturing the same

AssigneeNEC Corporation

InventorHiroshi Kawaguchi

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Abstract

A semiconductor device includes a gate insulating film on a semiconductor region of a first conductive type. There is provided on the gate insulating film a gate electrode having a channel length under a design rule of 350 nm or below. The gate electrode includes a first conductive film and a first silicide film formed on the first conductive film and a contact length between the first conductive film and the first silicide film in a channel length direction is longer than the channel length. Source and drain regions each including an impurity layer of a second conductive type formed on the surface of the semiconductor region and a second silicide film formed on the impurity layer. An insulating film spacer structure is provided to contact with side surfaces of the first conductive film of the gate electrode and to have a top surface thereof higher than a top surface of the gate electrode.

Claims27

Dependent claims

A semiconductor device, comprising:

a gate insulating film on a semiconductor region of a first conductive type;
a gate electrode provided on said gate insulating film, and comprising a conductive polysilicon film and a first titanium silicide film formed on said conductive polysilicon film a contact length between said conductive polysilicon film and said first titanium silicide film being longer than a gate length defined by the contact length of said conductive polysilicon film and said gate insulating film;
source and drain regions of a second conductive type, each of which comprises an impurity layer formed in a surface region of said semiconductor region and a second titanium silicide film formed on said impurity layer;
an insulating film spacer structure including first and second insulating film spacers, each of said first insulating film spacers being provided to contact with a side surface of said conductive polysilicon film of said gate electrode and each of said second insulating film spacers having the top surface thereof higher than a top surface of said gate electrode wherein said first titanium silicide film is spaced apart from said second insulating film spacers;
an interlayer insulating film covering said gate electrode, said source and drain regions and said insulating film spacer structure and having contact holes to said gate electrode and said source and drain regions;
and
a wiring pattern connected to said gate electrode and said source and drain regions through said contact holes.

4 more elements

A method of manufacturing a semiconductor device, comprising the steps of:

forming a gate insulating film on a semiconductive silicon region of a first conductive type;
forming a gate polysilicon film pattern for a gate electrode to have a predetermined gate length defined as the contact length between said gate polysilicon film pattern and said gate insulating film;
forming an insulating film spacer structure including at least two insulating film spacers as first and second insulating film spacers, wherein said first insulating film spacers are in contact with the side surfaces of said gate polysilicon film pattern such that the top surfaces of said first insulating film spacers are lower than a top surface of said gate polysilicon film pattern, so that a peripheral surface length of said gate polysilicon film pattern is longer than said gate length;
forming source and drain layers of a second conductive type in the surface region of said semiconductive silicon region using said gate polysilicon film pattern and said insulating film spacer structure as a mask;
depositing a metal film so as to cover the surface of said gate polysilicon film pattern in the gate length direction;
and
forming a first silicide film from said metal film and said gate polysilicon film pattern and a second silicide film from said metal film and said source and drain layers such that a top surface of said first silicide film is lower than a top surface of said insulating film spacer structure, wherein said first titanium silicide film is spaced apart from said second insulating film spacers.

4 more elements

A semiconductor device, comprising:

a gate insulating film on a semiconductor region of a first conductive type;
a gate electrode provided on said gate insulating film, and comprising a first conductive polysilicon film with a concave portion or convex portion having a predetermined depth or height and extending in a gate length direction defined as the contact length of said first conductive polysilicon film and said gate insulating film, and a first silicide film formed to cover the surface of said first conductive polysilicon film, a contact length between said first conductive polysilicon film and said first silicide film being longer than said gate length of said gate electrode;
source and drain regions of a second conductive type, each of which comprises an impurity layer formed in the surface region of said semiconductor region and a second silicide film formed on said impurity layer;
and
an insulating film spacer structure including insulating film spacers, each of which is provided to contact with only a side surface of said fast conductive film and said first silicide film of said gate electrode and to have a top surface thereof higher than a top surface of said first silicide film of said gate electrode;
an interlayer insulating film covering said gate electrode, said source and drain regions and said insulating film spacer structure and having contact holes to said gate electrode and said source and drain regions;
and
a wiring pattern connected to said gate electrode and said source and drain regions through said contact holes.

5 more elements

A method of manufacturing a semiconductor device, comprising the steps of:

forming a gate insulating film on a semiconductive silicon region of a first conductive type
forming a polysilicon film for a gate electrode, to have a predetermined gate length of a contact length of said polysilicon film and said gate insulating film and to have a film thickness thicker than the gate length;
forming insulating film spacers which are in contact with the side surfaces of said polysilicon film to have the same height as said polysilicon film;
selectively etching said polysilicon film to form a gate polysilicon film such that a peripheral surface length of said gate polysilicon film longer than said gate length and a surface of said gate polysilicon film is lower than top surfaces of said insulating film spacers;
forming source and drain regions of a second conductive type on the surface of said semiconductive silicon region using said gate polysilicon film and said insulating film spacers as a mask;
depositing a titanium film on the surface of the source and drain regions after said forming thereof;
and
forming a first silicide film from said titanium film and said gate polysilicon film and a second silicide film from said titanium film and said source and drain regions such that a top surface of said tint silicide film is lower than a top surface of said insulating film spacer structure, such that said insulating film spacer contacts only the side surfaces of said polysilicon film.

5 more elements

Dependencies are inferred from the claim text.

Facts

Application: 08/935,993Filed 23 Sep 1997 · continuation
Priority: JP 6-17060422 Jul 1994
Granted: 14 Apr 1998
Term ends: Not estimatedThe source records don’t support an estimate.

Classification15 codes

H10D 84/038
Using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology: using silicon technology, e.g. SiGe
H10D 30/0212
Of FETs having insulated gates [IGFET]: using self-aligned silicidation
H10D 30/0223
Of FETs having insulated gates [IGFET]: having source and drain regions or source and drain extensions self-aligned to sides of the gate
H10D 62/83
Characterised by the materials: being Group IV materials, e.g. B-doped Si or undoped Ge