Microcontroller with security logic circuit which prevents reading of internal memory by external program

A microcontroller which prevents reading of internal memory by an external program, comprising:

• a central processing unit coupled to address and data buses for fetching instructions and for accessing data in response to executing said instructions, said central processing unit providing a load instruction register signal while fetching instructions;
• a nonvolatile memory coupled to said address and data buses and having a control input for receiving an enable signal, said nonvolatile memory allowing accesses to data elements stored therein when said enable signal is active;
• an expansion port for coupling said address and data buses to an external bus;
• and
• security logic means coupled to said central processing unit and to said nonvolatile memory, for activating said enable signal when a latch means thereof is in a first state but keeping said enable signal inactive when said latch means is in a second state
• said latch means for being set to said first state when a first address within an address range of said nonvolatile memory is conducted on said address bus while said load instruction register signal is active, and for being reset to said second state when a second address which is not within said address range of said nonvolatile memory is conducted on said address bus while said load instruction register signal is active.