Method of fabricating a MOS device having a gate-side air-gap structure

A method for fabricating a MOS device having a gate-side air-gap structure, comprising:

• patterning a polysilicon gate on a semiconductor substrate, the polysilicon gate having a stacked structure of a gate polysilicon layer and a gate oxide layer;
• oxidizing the surface of the exposed semiconductor substrate and the polysilicon gate in an N.sub.2 O gas ambient to form an oxynitride film thereon;
• applying a first ion implantation on the semiconductor substrate to form a lightly doped source region and a lightly doped drain region embedded in the semiconductor substrate on opposite sides of the polysilicon gate structure;
• forming a nitride spacer adjacent to the polysilicon gate structure on the semiconductor substrate;
• forming an amorphous silicon spacer adjacent to the nitride spacer on the semiconductor substrate;
• applying a second ion implantation on the semiconductor substrate, the polysilicon gate structure and the amorphous silicon spacer;
• annealing the semiconductor substrate to form a heavily doped source region and a heavily doped drain region embedded in the semiconductor substrate;
• removing the nitride spacer;
• applying a third ion implantation to form halo regions beneath the lightly doped source and drain regions;
• and
• oxidizing the amorphous silicon spacer by a wet oxidation process to form a doped oxide spacer with an air gap and extended doped regions embedded in the semiconductor substrate beneath the doped oxide spacer.