Methods for forming liquid crystal displays including thin film transistors and gate pads having a particular structure

A method for forming a liquid crystal display including a thin film transistor, said method comprising the steps of:

• depositing a first metal layer on a substrate;
• depositing a second metal layer on said first metal layer opposite said substrate;
• patterning said first and second metal layers to provide a gate electrode on a TFT area of said substrate and to provide a gate pad on a pad area of said substrate;
• forming an insulating layer on said gate electrode and on said gate pad, and on said substrate;
• forming a semiconductor layer on said insulating layer opposite said gate electrode wherein said semiconductor layer includes a channel region opposite said gate electrode and first and second spaced apart source/drain regions separated by said channel region;
• forming first and second spaced apart metal source/drain electrodes on said respective first and second spaced apart semiconductor source/drain regions;
• forming a protective layer on said exposed portion of said first semiconductor layer opposite said substrate, on said first and second metal source/drain electrodes opposite said substrate, and on said insulating layer opposite said gate pad;
• forming a first contact hole in said protective layer exposing a portion of one of said source/drain electrodes;
• forming a second contact hole in said protective layer and said insulating layer exposing a portion of said gate pad wherein said second contact hole exposes portions of surface portions of said gate pad opposite said substrate and portions of said substrate adjacent said gate pad;
• forming a transparent conductive layer on said protective layer opposite said substrate;
• and
• patterning said transparent conductive layer to form a pixel electrode electrically connected to said exposed portion of said source/drain electrode and said gate pad.

A method for forming a liquid crystal display, said method comprising the steps of:

• forming a first metal layer on a substrate;
• patterning said first metal layer to provide a gate electrode on a TFT area of said substrate and to provide a gate pad on a pad area of said substrate;
• forming an insulating layer on said gate electrode and on said gate pad;
• forming a patterned semiconductor layer on said insulating layer opposite said gate electrode and opposite said gate pad;
• forming a second patterned metal layer on said semiconductor layer opposite said insulating layer;
• forming a transparent conductive layer on said second patterned metal layer and on said insulating layer opposite said substrate;
• and
• patterning said transparent conductive layer, said second patterned metal layer, and said patterned semiconductor layer to provide a data line, metal source/drain electrodes, and a pixel electrode.