Lateral IGBT
AssigneeKabushiki Kaisha Toshiba
InventorsAkio Nakagawa, Tomoko Matsudai, Hideyuki Funaki
Life of this patent
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AssigneeKabushiki Kaisha Toshiba
InventorsAkio Nakagawa, Tomoko Matsudai, Hideyuki Funaki
Estimating the term…
A sub-gate electrode is arranged to face, through a gate insulating film, a surface of a first p-type base layer which is interposed between a first n-type source layer and an n-type drift layer, and a surface of a second p-type base layer which is interposed between a second n-type source layer and the n-type drift layer and faces the first p-type base layer. A main gate electrode is arranged to face, through a gate insulating film, a surface of the second p-type base layer which is interposed between the second n-type source layer and the n-type drift layer and does not face the first p-type base layer. Three n-type MOSFETs are constructed such that one n-type channel is to be formed in the first p-type base layer and two n-type channels are to be formed in the second p-type base layer. The three channels are to be formed, so that the channel width is effectively enlarged and the current density is increased. The second p-type base layer has a length of 10 .mu.m or less in the drifting direction.
A lateral IGBT comprising:
Dependencies are inferred from the claim text.