Delta-Sigma .DELTA.-.SIGMA. modulator having a dynamically tunable continuous time Gm-C architecture

A tunable Delta Sigma (.DELTA..SIGMA.) modulator comprising a tunable Gm-C resonator and a quantizer having an associated quantization noise spectrum that are connected in a feedback loop and together convert an analog input signal having a signal spectrum into a digital output signal, said quantizer oversampling the input signal to expand the bandwidth of the modulator so that the signal spectrum occupies a portion of the expanded bandwidth, said resonator being tunable to shape the quantizer's quantization noise spectrum so that the bulk of the quantization noise in the digital output signal occurs outside the signal spectrum, said tunable Gm-C resonator comprising:

• a pair of integrating capacitors having capacitances C1 and C2 that are connected at first and second summing nodes, respectively;
• a fixed transconductance cell having transconductance G1 that is connected between the first and second summing nodes;
• and
• a tunable transconductance cell having a variable transconductance G.sub.T that is connected between the first and second summing nodes in an anti-parallel configuration with said fixed transconductance cell,
• said resonator having a frequency response H(s) of:
• ##EQU12## where .omega..sub.0 =›(GIG.sub.T)/(C1C2)!.sup.0.5.

A tunable Delta Sigma (.DELTA..SIGMA.) modulator, comprising:

• an input transconductance cell that converts an analog voltage signal, which has a signal spectrum that occupies a known bandwidth, into an analog current signal at a first summing node;
• a tunable resonator having a resonant frequency .omega..sub.0 that is connected to the first summing node and generates an integrated voltage signal at a second summing node;
• a quantizer that oversamples the integrated voltage signal and converts it into a digital output voltage signal, said output voltage signal having an output spectrum that is the sum of the signal spectrum and a quantization noise spectrum;
• a feedback path which returns said digital output voltage signal to the first and second summing nodes;
• and
• a digital-to-analog converter (DAC) in the feedback path that converts said digital output voltage signal into reproducible current levels;
• said tunable resonator comprising a positive current source (PCS) that supplies a common mode current at said first and second summing nodes, a fixed Gm cell having a transconductance G.sub.f, and a current divider and recombination circuit that modulates a differential mode current imposed on said common mode current to multiply transconductance Gf by a scale factor .alpha. without affecting the common mode current to tune the resonator's resonant frequency and shape the quantization noise spectrum to reduce the quantization noise in said output spectrum over the known bandwidth, said PCS having a low common mode impedance that stabilizes the modulator's common mode operating point at said first and second summing nodes and having a high differential mode impedance that maintains a high quality factor.

A tunable Delta Sigma (.DELTA..SIGMA.) modulator, comprising:

• an input transconductance cell that converts a differential analog voltage signal, which has a signal spectrum that occupies a known bandwidth, into a differential analog current signal at a first differential summing node;
• a first capacitor having capacitance C1 that is connected across the first differential summing node;
• a second capacitor having capacitance C2 connected across a second differential summing node;
• a fixed transconductance cell having transconductance G1 that is connected between the first and second differential summing nodes and generates a differential integrated voltage signal across the second capacitor;
• a binary comparator that oversamples the integrated voltage signal and converts it into a binary output voltage signal, said binary output voltage signal having an output spectrum that is the sum of the signal spectrum and a quantization noise spectrum;
• a binary digital-to-analog converter (DAC) that converts said binary output signal into a pair of differential current signals;
• a feedback path that returns the differential current signals to the first and second summing nodes, respectively;
• and
• a tunable transconductance cell having a variable transconductance G.sub.T that is connected between the first and second differential summing nodes in anti-parallel with said fixed transconductance cell, said capacitors and the fixed and tunable transconductance cells together forming a resonator having a frequency response of:
• ##EQU13## and a resonant frequency .omega..sub.0 =›(G1G.sub.T)/(C1C2)!.sup.0.5, said variable transconductance G.sub.T being tunable to select .omega..sub.0 from a range that includes DC to shape the quantization noise spectrum to reduce the quantization noise in said output spectrum over the known bandwidth.

An analog-to-digital converter (ADC), comprising a tunable Delta Sigma (.DELTA..SIGMA.) modulator that oversamples an analog input voltage signal and quantizes it into a binary output signal, said binary output voltage signal having an output spectrum that is the sum of the input signal's spectrum, which occupies a known bandwidth, and a quantization noise spectrum, said tunable .DELTA..SIGMA. modulator being tunable to shape the quantization noise spectrum to reduce the quantization noise in said output spectrum over the known bandwidth;

• a programmable digital filter having a passband and a stopband, said digital filter being programmable so that said passband passes said output spectrum and said stopband rejects said quantization noise;
• and
• a decimator that subsamples the digitally filtered binary output signal to generate an n-bit digital signal at a sampling frequency,
• said .DELTA..SIGMA. modulator comprising:
• an input transconductance cell that converts the analog voltage signal into an analog current signal at a first summing node;
• a first capacitor having capacitance C1 that is connected at the first summing node;
• a second capacitor having capacitance C2 connected at a second summing node;
• a fixed transconductance cell having transconductance G1 that is connected between the first and second summing nodes and generates an integrated voltage signal across said second capacitor;
• a binary comparator that oversamples the integrated voltage signal and converts it into the binary output voltage signal;
• a binary digital-to-analog converter (DAC) that converts said binary output signal into a pair of current signals;
• a feedback path that returns the current signals to the first and second summing nodes, respectively;
• and
• a tunable transconductance cell having a variable transconductance G.sub.T that is connected between the first and second differential summing nodes in anti-parallel with said fixed transconductance cell, said capacitors and the fixed and tunable transconductance cells together forming a resonator having a frequency response of:
• ##EQU14## and a resonant frequency .omega..sub.0 =›(G1G.sub.T)/(C1C2)!.sup.0.5, said variable transconductance G.sub.T being tunable to select .omega..sub.0 from a range that includes DC to shape the quantization noise spectrum to reduce the quantization noise in said output spectrum over the known bandwidth.

An analog-to-digital converter (ADC), comprising:

• a tunable Delta Sigma (.DELTA..SIGMA.) modulator that oversamples an analog input voltage signal and quantizes it into a binary output signal, said binary output voltage signal having an output spectrum that is the sum of the input signal's spectrum, which occupies a known bandwidth, and a quantization noise spectrum, said tunable .DELTA..SIGMA. modulator comprising a positive current source (PCS) that supplies a common mode, a fixed Gm cell having a transconductance Gf, and a current divider and recombination circuit that modulates a differential mode current imposed on said common mode current to multiply transconductance Gf by a scale factor without affecting the common mode current to shape the quantization noise spectrum to reduce the quantization noise in said output spectrum over the known bandwidth, said PCS having a low common mode impedance that stabilizes the modulator's common mode operating point at said first and second summing nodes and having a high differential mode impedance that maintains a high quality factor;
• a programmable digital filter having a passband and a stopband, said digital filter being programmable so that said passband passes said output spectrum and said stopband rejects said quantization noise;
• and
• a decimator that subsamples the digitally filtered binary output signal to generate an n-bit digital signal at a sampling frequency.