High resolution cold cathode field emission display
AssigneeIndustrial Technology Research Institute
InventorChao-chi Peng
Life of this patent
Estimating the term…
Abstract
The object of the present invention is to provide a cold cathode field emission display whose resolution is not limited by the provision of individual ballast resistors for each pixel or by the wiring system used to deliver voltage to the cold cathodes. This has been achieved by providing additional layers beneath the cold cathodes arrays so that said resistors and voltage delivery systems are located directly below the cold cathode arrays instead of alongside of them. Six different embodiments of the invention are described.
Claims26
A cold cathode field emission display comprising:
- an insulating substrate;
- a resistive layer on said substrate;
- a cathode distribution mesh on said resistive layer;
- a first dielectric layer on said resistive layer and said cathode distribution mesh;
- a conductive layer, patterned to form cathode columns on said first dielectric layer, underlapping said cathode distribution mesh along one dimension;
- gate lines for said display, formed of parallel, spaced conductors, over, and at an angle to, said cathode columns;
- via holes through said first dielectric layer, centrally located within the interstices of said cathode distribution mesh, through which conductive material from said cathode columns connects to said resistive layer;
- a second dielectric layer between said cathode columns and said gate lines;
- a plurality of openings, located at the intersections of said cathode columns and said gate lines, passing through said gate lines and said second dielectric layer;
- and
- a plurality of cone shaped field emission microtips, each centrally located within one of the openings,the base of each of said microtips being in contact with said conductive layer and the apex of each microtip being in the same plane as that of said gate lines.
A cold cathode field emission display comprising:
- an insulating substrate;
- a plurality of thin film resistors, each resistor having two ends, on said substrate;
- cathode distribution lines for said display, formed of parallel, spaced conductors on said substrate and contacting a first end of one of said thin film resistors;
- a first dielectric layer on said thin film resistors and said cathode distribution lines;
- a conductive layer, patterned to form cathode columns on said first dielectric layer, underlapping said cathode distribution mesh along one dimension;
- gate lines for said display, formed of parallel, spaced conductors, over, and at an angle to, said cathode columns;
- via holes through said first dielectric layer, located at the centers of the areas between the cathode distribution lines and the gate lines through which conductive material from said cathode columns connects to a second end of one of said thin film resistors;
- a second dielectric layer between said cathode columns and said gate lines;
- a plurality of openings, located at the intersections of said cathode columns and said gate lines, passing through said gate lines and said second dielectric layer;
- and
- a plurality of cone shaped field emission microtips, each centrally located within one of the openings, the base of each of said microtips being in contact with said cathode columns and the apex of each microtip being in the same plane as that of said gate lines.
A cold cathode field emission display comprising:
- an insulating substrate;
- a first conductive layer on said substrate;
- a cathode distribution mesh, formed from resistive material, on said first conductive layer;
- a first dielectric layer, having the same thickness as said cathode distribution mesh, on said first conductive layer, and surrounding said cathode distribution mesh;
- a resistive layer on said first dielectric layer and said cathode distribution mesh;
- a second dielectric layer on said resistive layer;
- a plurality of cathode columns comprising a conductive layer on said second dielectric layer, patterned so as not to overlap said cathode distribution mesh along one dimension;
- gate lines for said display, formed of parallel, spaced conductors, over, and at an angle to, said cathode columns;
- via holes through said second dielectric layer, centrally located within the interstices of said cathode distribution mesh, through which conductive material from said cathode columns connects to said resistive layer;
- a third dielectric layer between said cathode columns and said gate lines;
- a plurality of openings, located at the intersections of said cathode columns and said gate lines, passing through said gate lines and said third dielectric layer;
- and
- a plurality of cone shaped field emission microtips, each centrally located within one of the openings, the base of each of said microtips being in contact with one of said cathode columns and the apex of each microtip being in the same plane as that of said gate lines.
A cold cathode field emission display comprising:
- an insulating substrate;
- a conductive layer on said substrate;
- a first dielectric layer on said first conductive layer;
- via holes through said first dielectric layer down to the level of said first conductive layer;
- a plurality of thin film resistors on said first dielectric layer, each resistor having two ends, the first end being in contact with said first conductive layer through said via holes;
- a second dielectric layer on said first dielectric layer and said thin film resistors;
- a plurality of cathode columns comprising parallel conductive lines on said second dielectric layer;
- gate lines for said display, formed of parallel, spaced conductors, over, and at an angle to, said cathode columns;
- via holes through said second dielectric layer, located so as to enable each of said cathode columns to connect to a second end of one of said thin film resistors;
- a third dielectric layer between said cathode columns add said gate lines;
- a plurality of openings, located at the intersections of said cathode columns and said gate lines, passing through said gate lines and said third dielectric layer;
- and
- a plurality of cone shaped field emission microtips, each centrally located within one of the openings, the base of each of said microtips being in contact with a cathode column and the apex of each microtip being in the same plane as that of said gate lines.
Dependencies are inferred from the claim text.