US 5,719,529 AGranted

Operational amplifier and digital signal transfer circuit

AssigneeMitsubishi Denki Kabushiki Kaisha

InventorsHironori Kawahara, Yukio Ono, Seiichiro Kikuyama

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Abstract

An operational amplifier and a digital signal transfer circuit in which an output voltage does not decrease instantly even if an abrupt change of input signal due to noise causes a high-to-low transition to be superposed on an input signal. The operational amplifier includes a differential pair of transistors with a first transistor having a collector that is grounded and a second transistor having an emitter connected to the emitter of the first transistor; a current mirror circuit with a third transistor having a collector connected to an output node of the differential pair of transistors and a fourth transistor having a base connected to a base of the third transistor; a fifth transistor having a collector connected to an output terminal and a base connected to an output node of the current mirror circuit; and a capacitive element connected between the output node of the current mirror circuit and the output terminal.

Claims13

Dependent claims

An operational amplifier comprising:

a differential pair of transistors comprising a first transistor of a first polarity type having a control electrode receiving an input signal, a first electrode connected to a first power supply potential node, and a second electrode, and a second transistor of the first polarity type having a control electrode, a second electrode connected to the second electrode of said first transistor, and a first electrode as an output node of said differential pair of transistors;
a current mirror circuit comprising a third transistor of a second polarity type having a first electrode and a control electrode connected to said output node of said differential pair of transistors, and a fourth transistor of the second polarity type having a control electrode connected to said control electrode of said third transistor, a second electrode coupled to the first power supply potential node, and a first electrode as an output node of said current mirror circuit;
a fifth transistor of the second polarity type having a first electrode connected to an output terminal, a second electrode coupled to the first power supply potential node, and a control electrode connected to said output node of said current mirror circuit;
and
a capacitive element connected between said output node of said current mirror circuit and said output terminal.

2 more elements

A digital signal transfer circuit comprising;

an operational amplifier having a non-inverting input for receiving a digital input signal and including;
a differential pair of transistors comprising a first transistor of a first polarity type having a control electrode connected to said non-inverting input, a first electrode connected to a first power supply potential node, and a second electrode, and a second transistor of the first polarity type having a control electrode receiving a reference voltage, a second electrode connected to said second electrode of said first transistor, and a first electrode functioning as an output node of said differential pair of transistors;
a current mirror circuit comprising a third transistor of a second polarity type having a first electrode and a control electrode connected to said output node of said differential pair of transistors, and a second electrode connected to the first power supply potential node, and a fourth transistor of the second polarity type having a control electrode connected to said control electrode of said third transistor, a second electrode connected to the first power supply potential node, and a first electrode functioning as an output node of said current mirror circuit;
a fifth transistor of the second polarity type having a first electrode connected to an output terminal, a second electrode connected to the first power supply potential node, and a control electrode connected to said output node of said current mirror circuit;
and
a capacitive element connected between said output node of said current mirror circuit and said output terminal;
and
a comparator having a non-inverting input for receiving an output signal of said operational amplifier and an inverting input for receiving a reference voltage.

5 more elements

Dependencies are inferred from the claim text.

Facts

Application: 08/633,356Filed 17 Apr 1996
Granted: 17 Feb 1998
Term ends: Not estimatedThe source records don’t support an estimate.

Classification10 codes

H03F 3/3067
The collectors of complementary power transistors being connected to the output: with asymmetrical driving of the end stage
H03F 3/45085
Using bipolar transistors as the active amplifying circuit: long tailed pairs
H03F 3/45183
Using MOSFET transistors as the active amplifying circuit: long tailed pairs
H03F 2203/45346
Indexing scheme relating to differential amplifiers: the AAC comprising one or more FETs with multiple drains