Graded LDD implant process for sub-half-micron MOS devices
AssigneeMicron Technology, Inc.
InventorsAftab Ahmad, Charles Dennison
Life of this patent
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Abstract
A process for grading the junctions of a lightly doped drain (LDD) N-channel MOSFET by performing a low dosage phosphorous implant after low and high dosage arsenic implants have been performed during the creation of the N-LDD regions and N+ source and drain electrodes. The phosphorous implant is driven to diffuse across both the electrode/LDD junctions and the LDD/channel junctions.
Claims23
An NMOSFET on a semiconductor substrate, said NMOSFET having at least one graded LDD source region and at least one graded LDD drain region separated by a channel formed by:
- providing a gate structure on said semiconductor substrate;
- implanting said semiconductor substrate with a first low dosage N type conductivity-altering material to create a lightly doped source region and a lightly doped drain region;
- forming a sidewall spacer substantially abutting said gate structure to cover a portion of said first low dosage implanted semiconductor substrate;
- implanting said semiconductor substrate with a high dosage N type conductivity-altering material to create a heavily doped source region and a heavily doped drain region wherein each of said heavily doped source and drain regions supplant a portion of said lightly doped source and drain regions, respectively;
- and
- implanting said semiconductor substrate with a second low dosage N type conductivity-altering material to grade said heavily doped source and drain regions and remaining portions of said lightly doped source and drain regions.
A MOSFET on a semiconductor substrate, said MOSFET having at least one graded LDD source region and at least one graded LDD drain region separated by a channel formed by:
- providing a gate structure on said semiconductor substrate;
- implanting said semiconductor substrate with a first low dosage conductivity-altering material to create a lightly doped source region and a lightly doped drain region;
- forming a sidewall spacer substantially abutting said gate structure to cover a portion of said first low dosage implanted semiconductor substrate;
- implanting said semiconductor substrate with a high dosage conductivity-altering material to create a heavily doped source region and a heavily doped drain region wherein each of said heavily doped source and drain regions supplant a portion of said lightly doped source and drain regions, respectively;
- and
- implementing said semiconductor substrate with a second low dosage conductivity-altering material to grade said heavily doped source and drain regions and remaining portions of said lightly doped source and drain regions.
An NMOSFET on a semiconductor substrate, said NMOSFET having at least one graded LDD region formed by:
- providing a gate structure on said semiconductor substrate;
- implanting said semiconductor substrate with a first low dosage N type conductivity-altering material to create a lightly doped region;
- forming a sidewall spacer substantially abutting said gate structure to cover a portion of said first low dosage implanted semiconductor substrate;
- implanting said semiconductor substrate with a high dosage N type conductivity-altering material to create a heavily doped region wherein said heavily doped region supplants a portion of said lightly doped region;
- and
- implanting said semiconductor substrate with a second low dosage N type conductivity-altering material to grade said heavily doped region and remaining portion of said lightly doped region.
A MOSFET on a semiconductor substrate, said MOSFET having at least one graded LDD region formed by:
- providing a gate structure on said semiconductor substrate;
- implanting said semiconductor substrate with a first low dosage conductivity-altering material to create a lightly doped region;
- forming a sidewall spacer substantially abutting said gate structure to cover a portion of said first low dosage implanted semiconductor substrate;
- implanting said semiconductor substrate with a high dosage conductivity-altering material to create a heavily doped region, wherein said heavily doped region supplants a portion of said lightly doped region;
- and
- implanting said semiconductor substrate with a second low dosage conductivity-altering material to grade said heavily doped region and remaining portion of said lightly doped region.
Dependencies are inferred from the claim text.