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US 5,717,935 AGranted
Digital potentiometer
AssigneeDallas Semiconductor Corporation
InventorsGary V. Zanders, Francis A. Scherpenberg, Kevin E. Deierling
Life of this patent
Estimating the term…
Abstract
A digital rheostat or potentiometer which provides both increment and decrement operations from a single input such as a pushbutton. A certain pattern of input actuations will cause the direction of change to reverse. Settings of the potentiometer are stored in nonvolatile memory.
Claims10
A digital controller, comprising:
- (a) a counter comprising at least 6 bits, said counter containing counter data;
- (b) signal acceptance means for accepting a change signal, said change signal provided on a single electrical conductor and wherein said change signal can indicate an increment or a decrement;
- (c) effectuating means coupled to said counter and said signal acceptance means for causing an increment or a decrement in response to said change signal, in said counter data;
- (d) a non-volatile register comprising at least 6 bits, said non-volatile register containing storage data;
- and
- (e) controller means for controlling said counter and said non-volatile register, wherein said controller means is capable of at least two operations one of which is copying said storage data from said non-volatile register to said counter and a second of which is copying said counter data from said counter to said non-volatile register, responsive to a plurality of events, wherein said counter is loaded with said storage data upon occurrence of a first event, said first event being a power-up operation, and thereafter said counter data is modified responsive to said change signal, said change signal being indicative of a second event, and said counter data is copied from said counter to said non-volatile register upon occurrence of at least one of a third event, said third event comprising said change in said counter data, said change being greater than at least a pre-determined value and a fourth event, said fourth event being indicative of a power-down operation, and further wherein said second event and said third event are at least based, in part, upon contents of said counter.
3 more elements
A digital controller, comprising:
- (a) a first register comprising N bits in a first pattern, said first pattern partitioned into a first group of K bits having a second pattern and a second group of N-K bits, wherein said K bits are the most significant bits in said N bits;
- (b) signal acceptance means for accepting a change signal, said change signal provided on a single electrical conductor and providing increment and decrement instructions;
- (c) effectuating means coupled to said first register and said signal acceptance means for causing at least one of a change in bits stored in said first register having said first pattern and a change in bits stored in said first register having said second pattern, responsive to a change signal received by said signal acceptance means;
- (d) a second register comprising N bits in a third pattern;
- (e) controller means for controlling said first pattern and said third pattern, said controller means coupled to said first register and said second register, wherein said controller means is capable of replacing said third pattern with said first pattern, wherein the action of replacing the contents occurs in response to a change in those bits stored in said first register in a portion of those bits which is said second pattern.
2 more elements
A digital controller, comprising:
- (a) a volatile register comprising at least 6 bits in a first pattern, said first pattern partitioned into a first group of at least 3 bits having a second pattern and a second group of at least 3 bits, wherein said first group of at least 3 bits are the most significant bits in said volatile register;
- (b) signal acceptance means for accepting a change signal, said change signal indicative of an increment or a decrement and provided on a single conductor;
- (c) effectuating means coupled to said first register and said signal acceptance means for causing at least one of a change in bits stored in said volatile register having said first pattern and a change in bits stored in said first register having said second pattern, responsive to a signal received by said signal acceptance means;
- (d) a non-volatile register comprising at least 6 bits;
- (e) controller means for controlling said first pattern and said third pattern, said controller means coupled to said volatile register and said non-volatile register, wherein said controller means is capable of replacing said third pattern with said first pattern, wherein the action of replacing the contents occurs in response to a change in those bits stored in said first register in a portion of those bits which is said second pattern.
2 more elements
A digital potentiometer comprising:
- a control circuit adapted to receive a change signal, said change signal being a serial signal provided on a single conductor;
- a counter, connected to said control circuit, said counter adapted to be incremented or decremented;
- a memory circuit connected to said counter and to said control circuit;
- a decoder circuit connected to said counter;
- a wiper circuit, connected to said decoder circuit, for providing a resistance in accordance with the output of said decoder circuit;
- and
- wherein said control circuit can increment and decrement said counter in accordance with said change signal.
4 more elements
Dependencies are inferred from the claim text.