Output pin for selectively outputting one of a plurality of signals internal to a semiconductor chip according to a programmable register for diagnostics

An apparatus for testing a semiconductor chip, comprising:

• logic internal to the semiconductor chip that generates a first electrical signal and a second electrical signal;
• a programmable register coupled to the logic for storing selection information corresponding to selection of either the first electrical signal or the second electrical signal;
• an output pin of the semiconductor chip for outputting either the first electrical signal or the second electrical signal for performing diagnostics on the semiconductor chip
• a selector coupled to the logic that accepts the first electrical signal and the second electrical signal as inputs and selects between the first signal and the second signal for output onto the output pin of the semiconductor chip according to the selection information stored in the programmable register.

A method of accessing one of a plurality of signals internal to an integrated circuit through a single output pin, comprising the steps of:

• inputting each of the plurality of signals to a selector;
• programming a register with information specifying which particular signal of the plurality of signals is to be output onto the output pin;
• routing only that particular signal to the output pin;
• monitoring that particular signal;
• programming the register with information specifying a second signal from the plurality of signals for monitoring;
• switching the routing so that the second signal instead of the first signal is routed to the output pin;
• monitoring the second signal.