Gate controlled lateral bipolar junction transistor

A gate controlled lateral bipolar junction transistor comprising:

• a substrate comprising a surface layer of a semiconductor of a first conductivity type having formed thereunder a heavily doped buried layer of said first conductivity type forming a buried base electrode, and a base contact provided to the buried base electrode through the surface layer;
• an emitter region and a collector region of a second conductivity type defined in the surface layer of the substrate overlying the base electrode, the emitter and collector regions being laterally spaced apart with an intervening region of the first conductivity type forming an active base region;
• a gate electrode formed on the surface of the substrate over the active base region, and isolated therefrom by a layer of a gate dielectric;
• first and second terminals being provided respectively to the emitter region and collector region, and a third terminal to a surface contact to the buried layer, for operation of the structure as a bipolar transistor, and, a fourth terminal being provided to the gate electrode for application of a potential for controlling field inversion in a MOS channel region formed in the surface under the gate electrode between emitter and collector regions;
• thereby providing for concurrent control of both field effect and bipolar injection phenomena during operation of the transistor with a potential on the gate electrode for modifying the path of collector current through the base region during operation of the device as a bipolar transistor;
• the base region under the gate electrode being characterized by a selectively doped very shallow surface region for controlling the threshold voltage of the MOS channel region;
• and shallow relatively lightly doped regions of a second conductivity type being provided in the surface region adjacent and contacting the emitter and collector regions to reduce both an effective base width and MOS channel length of the transistor.