US 5,712,819 A · Flash EEPROM system with storage of sector characteristic information within the sector

Abstract

A memory system made up of electrically programmable read only memory (EPROM) or flash electrically erasable and programmable read only memory (EEPROM) cells. An intelligent programming technique allows each memory cell to store more than the usual one bit of information. More than one bit is stored in a cell by establishing more than two distinct threshold states into which the cell is programmed. A series of pulses of increasing voltage is applied to each addressed memory cell during its programming, the state of the cell being read in between pulses. The pulses are terminated upon the addressed cell reaching its desired state or a preset maximum number of pulses has been reached. An intelligent erase algorithm prolongs the useful life of the memory cells. A series of pulses is also applied to a block of cells being erased, the state of at least a sample number of cells being read in between pulses. The erasing process is stopped when the cells being read are determined to have reached a fully erased state or one of a number of other conditions has occurred. Individual records of the number of erase cycles experienced by blocks of flash EEPROM cells are kept, preferable as part of the blocks themselves, in order to maintain an endurance history of the cells within the blocks. Use of these various features provides a memory having a very high storage density and a long life, making it particularly useful as a solid state memory in place of magnetic disk storage devices in computer systems.

Claims27

Dependent claims

In an array of a plurality of electrically erasable and programmable read only memory (EEPROM) cells that individually include a field effect transistor having a threshold voltage that is alterable by controlling a level of charge on a floating gate thereof and which has an erase electrode, wherein:

the memory array is operated with the cells thereof being partitioned into individual distinct blocks of cells to be simultaneously erasable upon an erase voltage being applied to the erase electrodes thereof,
a characteristic of the individual blocks is stored within the respective individual block of cells,
a selected block of cells is erased by a method that comprises:
reading the characteristic of the selected block from the selected block itself,
temporarily storing outside of the selected block the characteristic read from the selected block,
thereafter subjecting the selected block to an erase cycle by simultaneously applying an erase voltage to the erase electrodes of the memory cells therein,
terminating the erase cycle, and
after termination of the erase cycle, writing the characteristic back into the selected block, and
after termination of the erase cycle, data is programmed into the erased cells of the selected block.

6 more elements

A method of erasing an array of a plurality of electrically erasable and programmable read only memory (EEPROM) cells that individually include a field effect transistor with a threshold voltage that is alterable by controlling a level of charge on a floating gate thereof and which has an erase electrode, said method comprising:

operating the memory array with the cells thereof being partitioned into individual distinct blocks of cells to be simultaneously erasable upon an erase voltage being applied to the erase electrodes thereof,
storing within individual ones of the blocks an indication of a characteristic of the block in which the indication is stored,
reading from a selected block to be erased the characteristic indication stored therein,
temporarily storing outside of the selected block the characteristic indication read from the selected block,
thereafter subjecting the selected block to an erase cycle by simultaneously applying an erase voltage to the erase electrodes of the memory cells therein,
terminating the erase cycle when the cells within the selected block have been erased, and
after termination of the erase cycle, writing the characteristic indication into said selected block.

4 more elements

Dependencies are inferred from the claim text.

Flash EEPROM system with storage of sector characteristic information within the sector

Life of this patent

Flash EEPROM system with storage of sector characteristic information within the sector

Life of this patent

Abstract

Claims27