Liquid crystal display device

A liquid crystal display device, comprising:

• a switch element array substrate having a plurality of data lines and a plurality of scanning lines both arranged being intersected to each other in a matrix form so as to form matrix intersection points;
• a plurality of pixel electrodes each arranged for each matrix intersection point;
• a plurality of switching elements each arranged for each matrix intersection point and each turned on or off by the scanning line, for applying write voltage supplied from the data line to the pixel electrode, respectively when turned on;
• and a data line driving circuit and a scanning line driving circuit each for selectively supplying a voltage to the data line and the scanning line, respectively, to drive the selected pixel electrode via the switching element;
• a counter substrate having a plurality of counter electrodes each arranged being opposed to each pixel electrode with a gap between the two;
• a liquid crystal layer sandwiched between the switching element array substrate and the counter substrate;
• a plurality of memory elements each interposed between the corresponding switching element and the corresponding pixel electrode, for holding the write voltage supplied through the data line as data, when the switching element is turned on;
• polarity inverting means for controlling connection with the pixel electrode on the basis of output of the memory element;
• and
• a decoder circuit included in at least one of the data driving circuit and the scan driving circuit, for selecting at least one of the data line and the scanning line on the basis of a combination of numerical signals.

A liquid crystal display device, comprising:

• a switch element array substrate having a plurality of data lines and a plurality of scanning lines both arranged being intersected to each other in a matrix form so as to form matrix intersection points;
• a plurality of pixel electrodes each arranged for each matrix intersection point;
• and a plurality of first switching elements each arranged for each matrix intersection point and each turned on or off by the scanning line, for applying write voltage supplied from the data line to the pixel electrode, respectively when turned on;
• a counter substrate having a plurality of counter electrodes each arranged being opposed to each pixel electrode with a gap between the two;
• a liquid crystal layer sandwiched between the switching element array substrate and the counter substrate;
• a plurality of memory elements of flip-flop structure each interposed between the corresponding first switching element and the corresponding pixel electrode, for holding the write voltage supplied through the data line as data, when the first switching element is turned on;
• a plurality of polarity switching signal lines each arranged in correspondence to the scanning line, to which potential inverted voltage is applied for each predetermined time period;
• and
• a plurality of second switching elements each for supplying the data held by the memory element to the pixel electrode by switching the polarity thereof in response to a polarity switching signal applied to the polarity switching signal line.

A liquid crystal display device, comprising:

• a switch element array substrate having a plurality of data lines and a plurality of scanning lines both arranged being intersected to each other in a matrix form so as to form matrix intersection points;
• a plurality of pixel electrodes each arranged for each matrix intersection point;
• and a plurality of first switching elements each arranged for each matrix intersection point and each turned on or off by the scanning line, for applying write voltage supplied from the data line to the pixel electrode, respectively when turned on;
• a counter substrate having a plurality of counter electrodes each arranged being opposed to each pixel electrode with a gap between the two;
• a liquid crystal layer sandwiched between the switching element array substrate and the counter substrate;
• a plurality of memory elements each interposed between the corresponding first switching element and the corresponding pixel electrode, for holding the write voltage supplied through the data line as data, when the first switching element is turned on;
• a plurality of display control lines each arranged in correspondence to each scanning line;
• a plurality of second switching elements each arranged for each matrix intersection point, for controlling connection between the pixel electrode and the display control line on the basis of output of the memory element;
• and
• a plurality of photoelectric transfer elements each one end terminal of which is connected to an input side of the memory element.