# US 5,710,689 A · Overcurrent protection for an ink-jet printhead

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- Number: US 5,710,689 A
- Document ID: US5710689A
- Status: Granted
- Kind: A
- Application number: 08/668,807
- Filed: 1996-06-24
- Granted: 1998-01-20
- Earliest claimed: 1996-06-24
- Assignees: Xerox Corporation
- Inventors: Juan J. Becerra; Sophie V. Vandebroek
- Web page: https://patentgrep.com/patent/US5710689A

## CPC

- H03K 17/0822: {in field-effect transistor switches}
- H10D 89/601: {for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs}
- H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M)
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A protection circuit prevents snapback events in MOS transistors associated with semiconductor or micromechanical structures, such as ink-jet ejectors. A bulk electrode associated with the MOS transistor is monitored for unusual high voltages which are consistent with an impending snapback event. The voltage on the bulk electrode is then used to turn on the control transistor which connects the gate of the MOS transistor to ground and thereby protects the device.

## Claims

### Claim 1

A semiconductor device providing overcurrent protection, comprising:
a MOS transistor defining a drain, a source, a gate, and a bulk electrode;
a control transistor having a base connected to the bulk electrode, the control transistor being configured to connect the gate of the MOS transistor to a safe potential in response to a current of a predetermined magnitude flowing in the bulk electrode of the MOS transistor; and
an AND gate having an input terminal connected to the control transistor and an output terminal connected to the gate of the MOS transistor.

### Claim 2

A semiconductor device providing overcurrent protection, comprising:
a MOS transistor defining a drain, a source, a gate, and a bulk electrode;
a control transistor having a base connected to the bulk electrode, the control transistor being configured to connect the gate of the MOS transistor to a safe potential in response to a current of a predetermined magnitude flowing in the bulk electrode of the MOS transistor; and
a pullup resistor and a voltage source, the voltage source connected through the pullup resistor to a collector of the control transistor and to the gate of the MOS transistor.

### Claim 3

A semiconductor device providing overcurrent protection, comprising:
a MOS transistor defining a drain, a source, a gate, and a bulk electrode;
a control transistor having a base connected to the bulk electrode, the control transistor being configured to connect the gate of the MOS transistor to a safe potential in response to a current of a predetermined magnitude flowing in the bulk electrode of the MOS transistor; and
a resettable latch having an input terminal connected to the control transistor and an output terminal connected to the gate of the MOS transistor.