# US 5,710,593 A · SCH phase adjustment for digitally synthesized video test signals

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 5,710,593 A
- Document ID: US5710593A
- Status: Granted
- Kind: A
- Application number: 08/589,695
- Filed: 1996-01-22
- Granted: 1998-01-20
- Earliest claimed: 1996-01-22
- Assignees: Tektronix, Inc.
- Inventors: John C. Reynolds
- Web page: https://patentgrep.com/patent/US5710593A

## CPC

- H04N 17/02: for colour television signals
- H04N: PICTORIAL COMMUNICATION, e.g. TELEVISION

## Abstract

A digital test signal generator includes the ability to adjust the SCH phase of the output test signal. A color frame reset pulse is generated at the beginning of each color frame of the output test signal. The color frame reset pulse is input to a direct digital signal synthesizer together with an SCH phase adjust signal to initialize the synthesizer with an SCH phase offset at the beginning of each color frame. By varying the amount of the SCH phase offset, the SCH phase in the output test signal is varied.

## Claims

### Claim 1

A digital test signal generator of the type that includes means for generating digital sine/cosine subcarrier signals at a desired frequency, means for providing digital chrominance component values and luminance values, and means for modulating the sine/cosine subcarrier signals with the digital chrominance component values and for combining the result with the luminance values to produce a digital test signal further comprising:
means for producing a color frame reset signal once per color frame of the digital test signal; and
means for initializing the generating means with a desired SCH phase offset in response to the color frame reset signal.

### Claim 2 (depends on 1)

The digital test signal generator as recited in claim 1 wherein the initializing means comprises:
means for storing the desired SCH phase offset; and
means in response to the color frame reset signal for inputting the desired SCH phase offset to the generating means as an initial value.

### Claim 3

A digital test signal generator comprising:
means for storing digital luminance values and a pair of digital color component values representing a desired test signal;
means for generating a pair of quadrature subcarrier signals;
means for modulating the quadrature subcarrier signals with the respective digital color component values and combining the result with the digital luminance values to produce a digital test signal corresponding to the desired test signal;
means for producing a color frame reset pulse once per color frame of the digital test signal; and
means for initializing the generating means with an SCH offset value in response to the color frame reset pulse so that the SCH phase of the digital test signal is offset by a desired amount.

### Claim 4

A method of generating a digital test signal with an adjustable SCH phase comprising the steps of:
storing digital luminance values and a pair of digital color component values representing a desired test signal in respective memories;
generating a pair of quadrature subcarrier signals by direct digital synthesis using a phase accumulator;
modulating the quadrature subcarrier signals with the respective digital color component values from the memories and combining the result with the digital luminance values from the memories to produce the digital test signal;
producing a color frame reset pulse once per color frame of the digital test signal; and
initializing the phase accumulator with an adjustable SCH offset value in response to the color frame reset pulse so that the SCH phase of the digital test signal is adjusted as desired.