# US 5,710,446 A · Active pixel sensor cell that utilizes a parasitic transistor to reset the photodiode of the cell > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 5,710,446 A - Document ID: US5710446A - Status: Granted - Kind: A - Application number: 08/647,687 - Filed: 1996-05-13 - Granted: 1998-01-20 - Earliest claimed: 1996-05-13 - Assignees: National Semiconductor Corporation - Inventors: Min-hwa Chi; Richard Billings Merrill; Albert Bergemont - Web page: https://patentgrep.com/patent/US5710446A ## CPC - H10F 39/8037: {the integrated elements comprising a transistor} - H10F 39/18: Complementary metal-oxide-semiconductor [CMOS] image sensors; Photodiode array image sensors - H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION ## Abstract The amount of silicon real estate consumed by a photodiode-based active pixel sensor cell is reduced by utilizing a parasitic transistor to reset the voltage on the photodiode in lieu of the conventional use of a reset transistor. The parasitic transistor is formed by forming a doped region a distance apart from the well region of the photodiode, which defines a parasitic channel region therebetween, and a reset gate over the parasitic channel region. ## Claims ### Claim 1 A row of active pixel sensor cells formed in a semiconductor substrate of a first conductivity type, the row of cells comprising: a reset region of a second conductivity type formed in the substrate; a plurality of spaced-apart photodiode regions of the second conductivity type formed in the substrate, the first photodiode region of the plurality of photodiode regions being formed a distance apart from the reset region, the junctions between each photodiode region and the substrate forming a photodiode; a first parasitic channel region defined between the reset region and the first photodiode region; a plurality of second parasitic channel regions defined between the photodiode regions such that a second parasitic channel region is defined between each pair of adjacent photodiode regions; a layer of insulation material formed over the first parasitic channel region and the second parasitic channel regions; a plurality of reset gates formed over the layer of insulation material such that a reset gate is formed over the first parasitic channel region and a reset gate is formed over each second parasitic channel region; a reset line that contacts each of the reset gates; and a plurality of sense transistors corresponding to the plurality of photodiode regions, each sense transistor having a gate connected to a corresponding photodiode region. ### Claim 2 (depends on 1) The row of active pixel sensor cells of claim 1 and further comprising a plurality of row select transistors, each row select transistor being connected in series to a corresponding sense transistor. ### Claim 3 (depends on 1) The row of active pixel sensor cells of claim 1 and further comprising a plurality of contact regions of the second conductivity type, each contact region being formed in a corresponding photodiode region, wherein the dose of each contact region is greater than the dose of the corresponding photodiode region. ### Claim 4 (depends on 1) The row of active pixel sensor cells of claim 1 wherein the photodiode regions are wells. ### Claim 5 (depends on 1) The row of active pixel sensor cells of claim 1 wherein the layer of insulation material includes gate oxide. ### Claim 6 A method for converting light energy into a plurality of pixel signals with a corresponding plurality of active pixel sensor cells formed in a semiconductor substrate of a first conductivity type, wherein the plurality of active pixel sensor cells include: a reset region of a second conductivity type formed in the substrate; a plurality of spaced-apart photodiode regions of the second conductivity type formed in the substrate, each photodiode region accumulating photogenerated electrons for a single pixel during an integration period, the first photodiode region of the plurality of photodiode regions being formed a distance apart from the reset region; a first parasitic channel region defined between the reset region and the first photodiode region; a plurality of second parasitic channel regions defined between the photodiode regions such that a second parasitic channel region is defined between each pair of adjacent photodiode regions; a layer of insulation material formed over the first parasitic channel region and the second parasitic channel regions; a plurality of reset gates formed over the layer of insulation material such that a reset gate is formed over the first parasitic channel region and a reset gate is formed over each second parasitic channel region; a reset line that contacts each of the reset gates; a plurality of sense transistors corresponding to the plurality of photodiode regions, each sense transistor having a gate connected to a corresponding photodiode region; and a plurality of row select transistors corresponding to the plurality of sense transistors, each row select transistor being connected to a corresponding sense transistor; the method comprising the steps of: applying a first voltage to the substrate; resetting each of the plurality of photodiode regions to a preintegration voltage which reverse biases each of the substrate to photodiode region junctions; collecting photogenerated electrons in each of the photodiode regions, the photogenerated electrons in each photodiode region changing the preintegration voltage to a post integration voltage; and applying a read voltage to the gates of each of the row select transistors an integration time after the photodiode regions are reset. ### Claim 7 (depends on 6) The method of claim 6 wherein the resetting step includes the steps of: applying a second voltage to the reset region for a predefined time, wherein the second voltage is greater than the first voltage; and applying a third voltage to each of the reset gates to form conductive channels in each of the second parasitic channel regions. ### Claim 8 (depends on 7) The method of claim 7 wherein the second voltage and the third voltage are equal. ### Claim 9 (depends on 7) The method of claim 7 wherein the third voltage is a charge-pumped voltage.