# US 5,708,432 A · Coherent sampling digitizer system > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 5,708,432 A - Document ID: US5708432A - Status: Granted - Kind: A - Application number: 08/684,466 - Filed: 1996-07-19 - Granted: 1998-01-13 - Earliest claimed: 1996-07-19 - Assignees: Credence Systems Corporation - Inventors: David Dean Reynolds; Roman Aureli Slizynski - Web page: https://patentgrep.com/patent/US5708432A ## CPC - G01R 31/31937: {Timing aspects, e.g. measuring propagation delay (G01R31/3191 and G01R31/31922 take precedence; marginal testing G06F11/24)} - G01R 31/3167: Testing of combined analog and digital circuits {(testing ADC's H03M1/1071)} - G01R 31/31922: {Timing generation or clock distribution (G01R31/3191 takes precedence)} - G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12) ## Abstract A digitizing system coherently samples an input signal of frequency F.sub.t and generates an output data sequence representing magnitudes of N successive samples. The digitizing system generates a timing signal by frequency dividing a clock signal of frequency F.sub.MCLK by an integer factor K and supplies the timing signal to a digitizer. The digitizer coherently samples the input signal N times over M cycles of input signal to produce an N-term data sequence representing one cycle of the input signal. The timing signal frequency sets the digitizer sampling rate. The digitizing system includes a computer programmed to execute an algorithm for finding an appropriate value for K so that the system substantially achieves coherent sampling of the input signal despite limitations in allowable ranges of K, M and N. The algorithm searches a Farey series to locate terms of the form P/Q from which it may derive candidate values of K (K=Q.sub.i *J), M (M=P*J) and N (N=Q.sub.i), wherein P and Q are relatively prime integers, J is an integer greater than 0 and Q.sub.i is an integer factor of Q. The algorithm locates the particular Farey series term most closely approximating the ratio F.sub.t /F.sub.MCLK for which candidate values of K, M and N fall within their allowable ranges. The digitizing system then frequency divides the master clock signal by that candidate value of K. ## Claims ### Claim 1 An apparatus for sampling an input signal of frequency F.sub.t, the apparatus comprising: means for generating a master clock signal of frequency F.sub.MCLK, that is other than an integer multiple of F.sub.t ; first means receiving the master clock signal for sampling the input signal N times during M consecutive cycles of the input signal at a rate F.sub.s =F.sub.MCLK /K, where M and N are integers greater than one; and second means for finding and supplying to said first means an appropriate integer value for K for which said first means most nearly approximates coherent sampling of the input signal. ### Claim 2 (depends on 1) The apparatus in accordance with claim 1 wherein said second means finds said appropriate value of K by performing a search of a Farey series to locate a particular Farey series term of the form P/Q most closely approximating F.sub.t /F.sub.MCLK for which computed values of at least one of K, M and N fall within a predetermined range, wherein K=J*Q/Q.sub.i, M=P*J and N=Q.sub.i, wherein P and Q are relatively prime integers, Q.sub.i is any integer factor of Q, and J and N are relatively prime integers. ### Claim 3 (depends on 2) The apparatus in accordance with claim 2 wherein said search includes a mediant traversal search of said Farey series directed toward F.sub.t /F.sub.MCLK. ### Claim 4 (depends on 2) The apparatus in accordance with claim 2 wherein said second means finds the appropriate value of K by performing a search of a Farey series to locate a particular Farey series term of the form P/Q most closely approximating F.sub.t /F.sub.MCLK for which K, M and N all fall within predetermined ranges. ### Claim 5 An apparatus for digitizing an input signal of frequency F.sub.t, the apparatus comprising: means for generating a master clock signal of frequency F.sub.MCLK, that is other than an integer multiple of F.sub.t ; first means receiving the master clock signal for sampling the input signal N times during M consecutive cycles of the input signal at a rate F.sub.MCLK /K, where M and N are integers greater than one and for digitizing each sample to produce an N-term output data sequence; and second means for finding and supplying to said first means an appropriate integer value for K for which the N-term data sequence produced by said first means has a data content most nearly approximates input signal magnitudes at times evenly distributed over one cycle of the input signal. ### Claim 6 (depends on 5) The apparatus in accordance with claim 5 wherein said second means finds the appropriate value of K by performing a search of a Farey series to locate a particular Farey series term of the form P/Q most closely approximating F.sub.t /F.sub.MCLK for which computed values of at least one of K, M and N fall within a predetermined range, wherein K=Q*J/Q.sub.i, M=P*J and N=Q.sub.i, wherein P and Q are relatively prime, J is any integer greater than 0, Q.sub.i is any integer factor of Q, and J and N are relatively prime. ### Claim 7 (depends on 6) The apparatus in accordance with claim 6 wherein said search includes a mediant traversal search of said Farey series directed toward F.sub.t /F.sub.MCLK. ### Claim 8 (depends on 6) The apparatus in accordance with claim 6 wherein said second means finds the appropriate value of K by performing a search of a Farey series to locate a particular Farey series term of the form P/Q most closely approximating F.sub.t /F.sub.MCLK for which K, M and N all fall within predetermined ranges. ### Claim 9 A method for periodically sampling an input signal of frequency F.sub.t in response to an input clock signal of frequency F.sub.MCLK, the method comprising the steps of: (a) searching a Farey series of limited order to find and select a Farey series number P/Q within said Farey series approximating F.sub.t /F.sub.MCLK, where P and Q are relatively prime integers; (b) computing an integer factor Q.sub.i of Q; (c) frequency dividing the input clock signal by an integer K=Q*J/Q.sub.i, where J is an integer greater than 0, to produce a periodic timing signal; and (d) successively sampling said input signal at a rate controlled by said timing signal. ### Claim 10 (depends on 9) The method in accordance with claim 9 wherein step (a) comprises the substeps of: performing a mediant traversal search of the Farey series to find two adjacent numbers of the Farey series bounding F.sub.t /F.sub.s, and selecting as the ratio P/Q one of said two adjacent numbers. ### Claim 11 (depends on 9) The method in accordance with claim 9 wherein step (a) comprises the substeps of: performing a mediant traversal search of the Farey series to find two adjacent numbers of the Farey series bounding F.sub.t /F.sub.s ; performing a horizontal traversal search of Farey series numbers progressively larger and smaller than said two adjacent numbers until encountering a particular Farey series number for which at least one of integers P, Q and K lies within a predetermined limited range; and selecting the particular Farey series number as the number P/Q. ### Claim 12 A method for digitizing an input signal of frequency F.sub.t in response to an input clock signal of frequency F.sub.MCLK, the method comprising the steps of: (a) searching a Farey series of limited order to find and select a Farey series number P/Q within said Farey series approximating F.sub.t /F.sub.MCLK, where P and Q are relatively prime integers; (b) computing an integer factor Q.sub.i of Q; (c) frequency dividing the input clock signal by an integer K=Q*J/Q.sub.i, where J is an integer greater than 0, to produce a periodic timing signal; and (d) digitizing said input signal at a rate controlled by said timing signal.