# US 5,708,283 A · Flip chip high power monolithic integrated circuit thermal bumps

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 5,708,283 A
- Document ID: US5708283A
- Status: Granted
- Kind: A
- Application number: 08/771,458
- Filed: 1996-12-20
- Granted: 1998-01-13
- Earliest claimed: 1994-10-20
- Assignees: Hughes Aircraft Company
- Inventors: Cheng P. Wen; Wah S. Wong; William D. Gray
- Web page: https://patentgrep.com/patent/US5708283A

## CPC

- H10W 72/20: Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W 20/483: {Interconnections over air gaps, e.g. air bridges}
- H10W 44/20: at high-frequency [HF] or radio frequency [RF]
- H10W 72/07236: {Soldering or alloying}
- H10W 72/251: {Materials}
- H10W 72/252: {comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu}
- H10W 72/952: {comprising metals or metalloids, e.g. PbSn, Ag or Cu}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A high power, flip-chip microwave monolithic integrated circuit (MMIC) assembly (30) has a high power microwave monolithic integrated circuit (MMIC) having a surface with an active area (72) in which heat is generated. The assembly also has a host substrate (34). A thermally conductive bump (51) formed over the surface of the MMIC has a first portion (51') in close proximity to and in thermal communication with the active area (72) of the MMIC and a second portion (51") which is in close proximity to and in thermal communication with the host substrate (34). The second portion (51") of the thermal bump (51) has a greater cross-sectional area than the first portion (51'). A multi-layer, multi-exposure method of manufacturing the improved thermal bump (51) includes several steps. A plating membrane (80) is formed on a surface of the MMIC (32). A first layer of negative photoresist is applied to the surface of the plating membrane (80), and is exposed with a first masked pattern of light. A second layer of negative photoresist is applied on top of the first layer of photoresist. The second layer of negative photoresist is exposed with a second masked pattern of light. Unexposed areas of the first and second layers of photoresist form a "T" shape. The first and second layers of photoresist are developed with a photoresist developer, thereby leaving a "T"-shaped via in the photoresist. An electrically and thermally conductive metal is plated onto the plating membrane and into the via to form a substantially "T"-shaped bump (51), which is then attached to a host substrate. The resulting bump has greater cross-sectional area at the host substrate than at the MMIC (32).

## Claims

### Claim 1

A high power, flip-chip microwave monolithic integrated circuit (MMIC) comprising:
a high power microwave monolithic integrated circuit (MMIC) having a surface with an active area in which heat is generated during operation of the MMIC wherein said active area comprises a plurality of source pads, gate pads, drain pads and electrically-conductive air bridges, said air bridges extending over said gate pads and said drain pads, said source pads being interposed in between said air bridges;
a host substrate;
a thermally conductive bump formed as a separate structure from said air bridge and consisting essentially of silver for removing said heat from said active area of said MMIC, and formed over said surface and in direct contact with said air bridge, with a first portion in close proximity to and in thermal communication with the active area of the MMIC and a second portion which is in close proximity to and in thermal communication with said host substrate, said second portion having a greater cross-sectional area than said first portion whereby said thermally conductive bump conducts said heat from said active area of said MMIC to said substrate;
said bump being electrically conductive and being in electrical contact with said source pads and said air bridges, said gate pads and drain pads being separated from said air bridges by free air spaces, said gate pads and drain pads being free from electrical contact with said bump;
said host substrate being a common ground to said source pads.

### Claim 2 (depends on 1)

A high power MMIC module as defined in claim 1, wherein said bump is substantially "T"-shaped having a cross-bar and a post, said cross-bar forming said second portion and said post forming said first portion.

### Claim 3 (depends on 2)

A high power MMIC module as defined in claim 2, wherein said second portion has a cross-sectional area at said substrate that is at least approximately 1.5 times greater than the cross-sectional area of said first portion at said MMIC.

### Claim 4 (depends on 1)

A high power MMIC module as defined in claim 1 wherein said second portion of said bump is soldered to said host substrate.

### Claim 5 (depends on 1)

A high power MMIC module as defined in claim 1 wherein said bump is substantially a four-sided, stepped pyramid having a base comprising said second portion of said bump and a top narrower than said base and comprising said first portion of said bump, said base being in thermal communication with said substrate and said top being in thermal communication with said MMIC.

### Claim 6 (depends on 1)

A high power, flip-chip microwave MMIC module as defined in claim 1, wherein said MMIC has a connection pad and said first portion of said bump is connected to said connection pad.

### Claim 7 (depends on 1)

A high power, flip-chip MMIC module as defined in claim 1, wherein said module further comprises a thin gold plating membrane interposed in between said first portion of said bump and said MMIC.