# US 5,707,901 A · Method utilizing an etch stop layer > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 5,707,901 A - Document ID: US5707901A - Status: Granted - Kind: A - Application number: 08/688,081 - Filed: 1996-07-29 - Granted: 1998-01-13 - Earliest claimed: 1994-06-29 - Assignees: Motorola, Inc. - Inventors: Jaeshin Cho; Naresh Saha - Web page: https://patentgrep.com/patent/US5707901A ## CPC - H10D 30/0223: {having source and drain regions or source and drain extensions self-aligned to sides of the gate} - H10D 64/021: {using multiple gate spacer layers, e.g. bilayered sidewall spacers} - H10P 50/283: {by chemical means} - Y10S 438/97: Specified etch stop material - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10 - Y10S: TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS ## Abstract An etch stop layer prevents damage to the underlying semiconductor material or metallization layer during etching of a dielectric layer overlying the etch stop layer. The etch stop layer, aluminum nitride or aluminum oxide is used underlying silicon dioxide to prevent damage to the semiconductor material during a fluorocarbon based etch of the silicon dioxide. The etch stop layer is also used underlying a silicon dioxide layer and overlying a titanium nitride or titanium tungsten layer used in metallization to prevent etching of the titanium nitride or titanium tungsten layer during etching of the silicon dioxide. ## Claims ### Claim 1 A method of forming a semiconductor structure, comprising the steps of: providing a semiconductor material; forming a first metallization layer over the semiconductor material; forming a layer comprised of titanium over the first metallization layer; forming a dielectric layer comprised of aluminum nitride over the layer comprised of titanium; forming a dielectric layer comprised of silicon over the dielectric layer comprised of aluminum nitride; removing a portion of the dielectric layer comprised of silicon over the layer comprised of titanium; removing a portion of the dielectric layer comprised of aluminum nitride over the layer comprised of titanium; and forming a second metallization layer over the layer comprised of titanium. ### Claim 2 (depends on 1) The method of claim 1 wherein the step of forming the layer comprised of titanium comprises forming the layer comprised of titanium to be comprised of titanium nitride. ### Claim 3 (depends on 1) The method of claim 1 wherein the step of forming the layer comprised of titanium comprises forming the layer comprised of titanium to be comprised of titanium tungsten. ### Claim 4 (depends on 1) The method of claim 1 wherein the step of forming the dielectric layer comprised of silicon comprises forming the dielectric layer comprised of silicon to be comprised of silicon dioxide. ### Claim 5 (depends on 1) The method of claim 1 wherein the step of removing the portion of the dielectric layer comprised of silicon comprises removing the portion of the dielectric layer comprised of silicon with a fluorocarbon based dry etchant. ### Claim 6 (depends on 1) The method of claim 1 wherein the step of removing the portion of the dielectric layer comprised of silicon comprises removing the portion of the dielectric layer comprised of silicon with a fluorocarbon based dry etchant, wherein the dielectric layer comprised of aluminum nitride acts as an etch stop layer. ### Claim 7 (depends on 1) The method of claim 1 wherein the step of removing the portion of the dielectric layer comprised of aluminum nitride comprises removing the portion of the dielectric layer comprised of aluminum nitride with an ammonium hydroxide etchant. ### Claim 8 (depends on 1) The method of claim 1 further comprising the steps of: forming a gate layer over a portion of the semiconductor material; forming a channel region in a portion of the semiconductor material underlying the gate layer; forming a source region and a drain region in a portion of the semiconductor material adjacent the channel region; and forming a spacer adjacent the gate layer over a portion of the semiconductor material, wherein the spacer is comprised of a dielectric layer comprised of aluminum and a dielectric layer comprised of silicon, and wherein the first metallization layer makes electrical contact to the source region and the drain region. ### Claim 9 A method of forming a semiconductor structure, comprising the steps of: providing a semiconductor material; forming a gate layer over a portion of the semiconductor material; forming a channel region in a portion of the semiconductor material underlying the gate layer; forming a source region and a drain region in a portion of the semiconductor material adjacent the channel region; forming a first dielectric layer comprised of aluminum over the semiconductor material and the gate layer; forming a first dielectric layer comprised of silicon over the first dielectric layer comprised of aluminum; and forming a spacer adjacent to the gate layer by removing a portion of the first dielectric layer comprised of silicon and by removing a portion of the first dielectric layer comprised of aluminum while using the first dielectric layer comprised of silicon as a mask. ### Claim 10 (depends on 9) The method of claim 9 wherein the step of forming the first dielectric layer comprised of aluminum comprises forming the first dielectric layer comprised of aluminum to be comprised of aluminum nitride. ### Claim 11 (depends on 9) The method of claim 9 further comprising the steps of: forming a first metallization layer over the source region and the drain region; forming a layer comprised of titanium over the first metallization layer; forming a second dielectric layer comprised of aluminum over the layer comprised of titanium; forming a second dielectric layer comprised of silicon over the second dielectric layer comprised of aluminum; removing a portion of the second dielectric layer comprised of silicon; removing a portion of the second dielectric layer comprised of aluminum; and forming a second metallization layer over the layer comprised of titanium. ### Claim 12 (depends on 11) The method of claim 11 wherein the step of forming the layer comprised of titanium comprises forming the layer comprised of titanium to be comprised of titanium nitride. ### Claim 13 (depends on 11) The method of claim 11 wherein the step of forming the layer comprised of titanium comprises forming the layer comprised of titanium to be comprised of titanium tungsten. ### Claim 14 (depends on 9) The method of claim 9 wherein the step of removing the portion of the first dielectric layer comprised of silicon comprises removing the portion of the first dielectric layer comprised of silicon with a fluorocarbon based dry etchant. ### Claim 15 (depends on 9) The method of claim 9 wherein the step of removing the portion of the first dielectric layer comprised of aluminum comprises removing the portion of the first dielectric layer comprised of aluminum with an ammonium hydroxide etchant. ### Claim 16 A method of forming a semiconductor structure, comprising the steps of: providing a semiconductor material; forming a gate layer over a portion of the semiconductor material; forming a channel region in a portion of the semiconductor material underlying the gate layer; forming a source region and a drain region in a portion of the semiconductor material adjacent the channel region; forming a spacer adjacent the gate layer over a portion of the semiconductor material, wherein the spacer is comprised of a first dielectric layer comprised of aluminum and a first silicon dioxide layer; forming a second dielectric layer comprised of aluminum over a portion of the semiconductor material over the source region and the drain region and over the spacer and the gate layer; forming a second silicon dioxide layer over the second dielectric layer comprised of aluminum; removing a portion of the second silicon dioxide layer over a portion of the source region and a portion of the drain region; removing a portion of the second dielectric layer comprised of aluminum over a portion of the source region and a portion of the drain region; forming a first metallization layer to make electrical contact with the source region and the drain region; forming a layer comprised of titanium over the first metallization layer; forming a third dielectric layer comprised of aluminum over the layer comprised of titanium; forming a third silicon dioxide layer over the third dielectric layer comprised of aluminum; removing a portion of the third silicon dioxide layer over the layer comprised of titanium, using the third dielectric layer comprised of aluminum as an etch stop; removing a portion of the third dielectric layer comprised of aluminum over the layer comprised of titanium; and forming a second metallization layer over the layer comprised of titanium. ### Claim 17 A method of forming a semiconductor structure, the method comprising the steps of: providing a semiconductor material; providing a dielectric layer comprised of aluminum overlying the semiconductor material; removing a portion of the dielectric layer comprised of aluminum after the step of providing the dielectric layer comprised of aluminum and prior to exposing the dielectric layer to an anneal; exposing the dielectric layer to an anneal after the step of removing the portion of the dielectric layer; and exposing the dielectric layer comprised of aluminum to a fluorocarbon based etchant after providing the dielectric layer comprised of aluminum and before removing the portion of the dielectric layer comprised of aluminum.