# US 5,706,461 A · Method and apparatus for implementing virtual memory having multiple selected page sizes > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 5,706,461 A - Document ID: US5706461A - Status: Granted - Kind: A - Application number: 08/638,223 - Filed: 1996-04-26 - Granted: 1998-01-06 - Earliest claimed: 1993-03-02 - Assignees: International Business Machines Corporation - Inventors: Mark William Branstad; Jonathan William Byrn; Gary Scott Delp; Philip Lynn Leichty; Kevin Gerard Plotz; Fadi-Christian E. Safi; Albert Alfonse Slane - Web page: https://patentgrep.com/patent/US5706461A ## CPC - G06F 12/10: Address translation - G06F 12/1009: using page tables, e.g. page table structures - G11B 25/043: {using rotating discs} - G06F 12/0292: {using tables or multilevel address translation means (G06F12/023 takes precedence; address translation in virtual memory systems G06F12/10)} - G06F 2212/652: Page size control - G11B 33/12: Disposition of constructional parts in the apparatus, e.g. of power supply, of modules - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - G11B: INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER (recording measured values in a way that does not require playback through a transducer G01D9/00; recording or playback apparatus using mechanically marked tape, e.g. punched paper tape, or using unit records, e.g. punched or magnetically marked cards G06K; transferring data from one type of record carrier to another G06K1/18; circuits for coupling output of reproducer to radio receiver H04B1/20; gramophone pick-ups or like acoustic electromechanical transducers or circuits therefor H04R) ## Abstract A method and apparatus for implementing virtual memory having multiple selected page sizes are provided. A virtual address includes a map index and a frame offset. A selector mechanism receives the virtual address frame offset and generates an offset and index. A frame map table indexes the virtual address map index and the selector generated index and generates a base address. The frame map table generated base address and the selector generated offset are combined to provide a physical address. ## Claims ### Claim 1 An apparatus for implementing virtual memory having multiple selected page sizes comprising: a virtual address; the virtual address including a map index and a frame offset; selector means for receiving the virtual address frame offset and the multiple selected page sizes for generating a selector offset and a selector index; said selector means includes multiplier means for multiplying a frame map table page index with a frame size multiplier value; frame map table means for indexing the virtual address map index and the generated selector index and generating a base address; and means for adding the frame map table means generated base address and the generated selector offset and providing a physical address. ### Claim 2 (depends on 1) An apparatus for implementing virtual memory as recited in claim 1 wherein said selector means provides a sequence of page sizes, each sequential page size having a ratio of 2 to a previous adjacent page size. ### Claim 3 (depends on 1) An apparatus for implementing virtual memory as recited in claim 1 includes a plurality of free memory lists. ### Claim 4 (depends on 3) An apparatus for implementing virtual memory as recited in claim 3 wherein said free memory lists are organized as chains of pointers. ### Claim 5 (depends on 3) An apparatus for implementing virtual memory as recited in claim 3 wherein said free memory lists are organized as stacks and a top of each said stack is cached in a selected storage. ### Claim 6 (depends on 3) An apparatus for implementing virtual memory as recited in claim 3 wherein said free memory lists are organized as cached first-in first-out (FIFO) buffers. ### Claim 7 An apparatus for implementing virtual memory having multiple selected page sizes comprising: a virtual address; the virtual address including a map index and a frame offset; selector means for receiving the virtual address frame offset and the multiple selected page sizes for generating a selector offset and a selector index; said selector means includes means for storing a plurality of predetermined page boundaries; frame map table means for indexing the virtual address map index and the generated selector index and generating a base address; and means for adding the frame map table means generated base address and the generated selector offset and providing a physical address. ### Claim 8 (depends on 7) An apparatus for implementing virtual memory as recited in claim 7 wherein said selector means includes a plurality of subtractors coupled to said predetermined page boundaries storage means. ### Claim 9 (depends on 7) An apparatus for implementing virtual memory as recited in claim 7 wherein said selector means includes means for identifying an error; said error identifying means including means for receiving said virtual address frame offset and identifying said error responsive to said received virtual address frame offset being greater than each of said predetermined boundary values. ### Claim 10 (depends on 8) An apparatus for implementing virtual memory as recited in claim 8 wherein each of said subtractors receives said virtual memory frame offset and the multiple selected page sizes for generating said selector offset. ### Claim 11 A method for implementing virtual memory having multiple selected page sizes comprising the steps of: receiving a virtual address; said virtual address including a map index and a frame offset; generating a selector offset and a selector index utilizing said virtual address frame offset and a page size array; said step of generating said selector offset and said selector index utilizing said virtual address frame offset and said page size array further includes the step of generating a selector limit utilizing said virtual address frame offset and said page size array; indexing a frame map table with both the virtual address map index and said generated selector index and generating a base address; and adding said generated base address and said generated selector offset for providing a physical address. ### Claim 12 (depends on 11) A method for implementing virtual memory as recited in claim 11 wherein said step of generating said selector offset and said selector index utilizing said virtual address frame offset and said page size array further includes the step of identifying an error responsive to said received virtual address frame offset being greater than said page size array.