# US 5,706,356 A · Audio processor > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 5,706,356 A - Document ID: US5706356A - Status: Granted - Kind: A - Application number: 08/640,497 - Filed: 1996-05-01 - Granted: 1998-01-06 - Earliest claimed: 1996-05-01 - Inventors: Gaylord K. Walden - Web page: https://patentgrep.com/patent/US5706356A ## CPC - H03G 7/002: {in untuned or low-frequency amplifiers, e.g. audio amplifiers (H03G7/007, H03G7/001, H03G7/008, H03G7/02, H03G7/06 take precedence)} - H03G: CONTROL OF AMPLIFICATION ## Abstract An audio processor (10) that is specifically designed to be included in combination with an audio recording system or a movie theater sound system. The processor (10) consists of two major circuits, a single-ended, limited compressor/expander circuit (12) and an output circuit (205) that incorporates a dynamic noise reduction (DNR) circuit (206). A single adjustment sets the trip points for both the low-level and high-level operating mode of the compressor/expander circuit (12). Likewise, a single adjustment sets the bandwidth of the DNR circuit (206). When the processor is in the expand mode, the two circuits (12,206) complement each other such that when the low-level expander lowers the signal level, the source noise is also reduced. The reduced signal results in an earlier activation of the DNR circuit (206) bandwidth control which reduces its bandwidth resulting in a further reduction of the noise level. The audio processor (10) operates to produce a warmer, more natural reproduction of the music while reducing noise levels. ## Claims ### Claim 1 An audio processor comprising: a) a single-ended, limited compressor/expander circuit designed to produce compression or expansion of an audio signal, wherein the compression or expansion is created by offsetting the audio signal to a new level, said circuit having a channel A section and a channel B section wherein each said section comprises: (1) means for receiving the audio signal from an audio source and producing a buffered audio signal, (2) a level-set potentiometer having means for receiving and setting the level of the buffered audio signal and producing a source audio signal, (3) an absolute value circuit having means for receiving and performing full-wave rectification of the source audio signal, and producing an absolute value signal, (4) a threshold set circuit having means for receiving a channel A absolute value signal and a channel B absolute value signal and means for adjusting the amplitude of these signals and summing these signals to produce a summed absolute value signal, (5) a peak voltage detector having means for detecting the peak level of the summed absolute value signal and producing a d-c level signal, (6) means for receiving and switching the summed absolute value signal and producing a compress or expand input which is applied to a high-level control circuit having means for producing a high-level signal, (7) means for receiving and switching the d-c level signal and producing a compress or expand signal which is applied to a low-level control circuit having means fop producing a low-level signal, (8) a summing circuit having means for summing the high-level and low-level signals and producing an attenuator signal, (9) an electronic attenuator having means for increasing or the amplitude of the source audio signal relative to the attenuator signal and producing a level processed audio signal, and b) an output circuit comprising a dynamic noise reduction (DNR) circuit that is applied the level processed audio signal after which said DNR produces a processed audio signal which is applied through a level adjust potentiometer to a buffer circuit from where a channel A output audio signal is produced. ### Claim 2 (depends on 1) The audio processor as specified in claim 1 wherein said audio source comprises an audio tape, a compact disc, a synthesized sound or a natural or artificial sound. ### Claim 3 (depends on 1) The audio processor as specified in claim 1 wherein said level adjust potentiometer comprises an electronic potentiometer circuit connected across a d-c voltage source and produces a voltage level signal and a reference voltage level that are applied to a difference amplifier that produces a difference voltage level signal, wherein said electronic potentiometer circuit has an input voltage controlled amplifier and an output voltage controlled amplifier, wherein the control of said input voltage controlled amplifier is affected by the voltage level signal and the output voltage controlled amplifier is affected by the difference voltage level signal, wherein the amplitude of the buffered audio signal is increased or decreased by the input voltage controlled amplifier to produce the source audio signal. ### Claim 4 (depends on 1) The audio processor as specified in claim 1 wherein said means for receiving the channel A and channel B absolute value signals comprises a first threshold potentiometer that is applied the channel A absolute value signal and a series connected second threshold potentiometer that is applied a channel B absolute value signal from a channel B absolute value circuit, wherein the wipers of said first and second threshold potentiometers are summed and applied through an amplifier from where the summed absolute value signal is produced. ### Claim 5 (depends on 1) The audio processor as specified in claim 1 further comprising display driver that drives an LED display that indicates the internal signal level of said processor, wherein the absolute value signal is the source for said display driver. ### Claim 6 (depends on 1) The audio processor as specified in claim 1 further comprising a display driver that is applied the summed absolute value signal and indicates when the summed absolute value signal exceeds a reference voltage indicating the threshold setting. ### Claim 7 (depends on 1) The audio processor as specified in claim 1 wherein said peak voltage detector develops a d-c level proportional to the peak amplitude of the summed absolute value signal to produce the low-level signal. ### Claim 8 (depends on 1) The audio processor as specified in claim 1 wherein said means for receiving and switching the summed absolute value signal and the d-c level signal comprises a double-pole, double-throw switch that determines the compressor/expander function, wherein the first said switch is applied the summed absolute value signal and the second pole of said switch is applied the d-c level signal, wherein the switch position determines, via a pair of switch hitter amplifiers, the polarity of the summed absolute value signal and the d-c level signal, wherein these signals are applied to a voltage comparator circuit that produces a high-level signal, and to a voltage-to-current converter circuit that produces a low-level signal, wherein the two signals are summed to produce the attenuator signal. ### Claim 9 An audio processor comprising: a) a single-ended, limited compressor/expander circuit designed to produce compression or expansion of an audio signal, wherein the compression or expansion is created by offsetting the audio signal to a new level, said circuit having a channel A section and a channel B section, where each said section comprises: (1) a non-inverting amplifier that is applied an audio signal from an audio source and produces a buffered audio signal, (2) a level-set potentiometer which allows the audio signal level to be optimally set, where said level-set potentiometer is connected across a d-c voltage source and produces a voltage level signal and a reference voltage level that are applied to a difference amplifier that produces a difference voltage level signal, (3) an electronic potentiometer circuit having an input voltage controlled amplifier and an output voltage controlled amplifier where the control of said input voltage controlled amplifier is affected by the voltage level signal, and the output voltage controlled amplifier is affected by the difference voltage level signal, wherein the buffered amplitude of the audio signal is increased or decreased by the input voltage controlled amplifier to produce a source audio signal, (4) an absolute value circuit having means for performing full-wave rectification of the applied source audio signal and producing a channel A absolute value signal, (5) a display driver that is applied the channel A absolute value signal and drives an LED display that indicates the internal signal level of said audio processor, (6) a threshold set circuit that comprises a first threshold potentiometer that is applied the channel A absolute value signal and a second threshold potentiometer that is applied a channel B absolute value signal from a channel B absolute value circuit, where the wipers of said first and second threshold potentiometer are summed and applied through an amplifier that produces a summed absolute value signal, (7) a peak voltage detector that is applied the summed absolute value signal and develops a d-c level proportional to the peak amplitude of the summed absolute value signal and produces a d-c level signal, (8) a switch-hitter circuit having a double-pole, double-throw switch that determines the compressor/expander function of said audio processor, wherein the first contact of the first pole of said switch is applied the summed absolute value signal and the first contact of the second pole of said switch is applied the d-c level signal, wherein the switch signals are applied to a set of switch-hitter amplifiers wherein the signals are either sourced through the switch hitter amplifiers or subtracted from a reference voltage by the switch hitter amplifiers dependent upon the position of the compression/expansion switch, wherein the output of the switch hitter amplifier sourced the summed absolute value signal and produces a d-c referenced absolute value signal and the amplifier sourced the d-c level signal produces a d-c referenced level signal wherein the d-c referenced absolute value signal is applied to a voltage comparator circuit that produces a high level signal and the d-c referenced level signal is applied to a voltage to current converter circuit that produces a control current sink proportional to the summed absolute value signal to create a low level signal, wherein the two signals are summed to produce an attenuator signal, (9) an electronic attenuator that increases or decreases the amplitude of the source audio signal relative to the attenuator signal and produces a level processed audio signal, b) an output circuit comprising: (1) a dynamic noise reduction (DNR) circuit that is applied the level processed audio signal and produces a processed audio signal, and (2) a buffer circuit that is applied the processed audio signal producing a buffered processed audio signal that is applied to said output potentiometer from where a channel A output audio signal is produced. ### Claim 10 (depends on 9) The audio processor as specified in claim 9 wherein said audio source comprises an audio tape, a compact disc, a synthesized sound or a natural or artificial sound. ### Claim 11 (depends on 9) The audio processor as specified in claim 9 wherein when an audio signal is present, said level set potentiometer is adjusted to optimize internal signal levels. ### Claim 12 (depends on 9) The audio processor as specified in claim 9 further comprises a threshold display drive circuit that is applied the summed absolute value signal, where said drive circuit enables an LED display that illuminates during the peak levels of the audio signal. ### Claim 13 (depends on 9) The audio processor as specified in claim 9 wherein said voltage comparator circuit comprises two voltage comparators, wherein said first voltage comparator is set to trip a reference voltage (VREF) and said second voltage comparator is set to trip at 2 dB higher than VREF. ### Claim 14 (depends on 9) The audio processor as specified in claim 9 wherein said peak voltage detector further comprises a single-pole, double-throw compress/expand switch and a low-level, threshold set potentiometer, wherein wherein said switch is placed in the compress position said peak voltage detector is set at a fixed gain, and when said potentiometer allows the gain of said peak detector to be varied when said switch is placed in the expand position.