# US 5,706,222 A · Multiple mode peak detector > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 5,706,222 A - Document ID: US5706222A - Status: Granted - Kind: A - Application number: 08/641,059 - Filed: 1996-04-29 - Granted: 1998-01-06 - Earliest claimed: 1996-04-29 - Assignees: International Business Machines Corporation - Inventors: Anthony Richard Bonaccio; Mark Andrew Bergquist; Kirk William Lang; Anthony John Perr - Web page: https://patentgrep.com/patent/US5706222A ## CPC - G11B 20/10009: {Improvement or modification of read or write signals} - G11B: INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER (recording measured values in a way that does not require playback through a transducer G01D9/00; recording or playback apparatus using mechanically marked tape, e.g. punched paper tape, or using unit records, e.g. punched or magnetically marked cards G06K; transferring data from one type of record carrier to another G06K1/18; circuits for coupling output of reproducer to radio receiver H04B1/20; gramophone pick-ups or like acoustic electromechanical transducers or circuits therefor H04R) ## Abstract A peak detector having several novel detection modes including detecting a pair of peaks with opposite polarity and selecting whether or not the peaks must cross programmed thresholds to be detected. The novel detection modes together with several known detection modes are provided in one unit and can be selected by the user. A power down feature is also provided. ## Claims ### Claim 1 A computer system comprising: receiving means for receiving an input signal waveform; identification means coupled to the receiving means for identifying peak characteristics of the waveform; output means coupled to the identification means for outputting a plurality of logic signals corresponding to the peak characteristics; and logic means coupled to the output means and responsive to the logic signals for detecting a dibit in the waveform. ### Claim 2 (depends on 1) The computer system of claim 1, wherein the logic means includes means for detecting a negative-to-positive dibit and for detecting a positive-to-negative dibit. ### Claim 3 (depends on 2) The computer system of claim 2, wherein the logic means further includes means for detecting a dibit having a valid first peak and a valid second peak. ### Claim 4 (depends on 2) The computer system of claim 2, wherein the logic means further includes means for detecting an individual valid peak. ### Claim 5 (depends on 3) The computer system of claim 3, wherein the identification means includes means for selecting a positive threshold which a positive peak must cross to be characterized as valid and means for selecting a negative threshold which a negative peak must cross to be characterized as valid. ### Claim 6 (depends on 3) The computer system of claim 3, wherein the logic means further includes selection means for causing the detector to output a detection pulse whenever only one of the following are detected: the positive-to-negative dibit, the negative-to-positive dibit, the dibit having a valid first peak and a valid second peak, or an individual valid peak. ### Claim 7 (depends on 4) The computer system of claim 4, wherein the logic means further includes selection means for causing the detector to output a detection pulse whenever only one of the following are detected: the positive-to-negative dibit, the negative-to-positive dibit, or the individual valid peak. ### Claim 8 An information handling system comprising: receiving means for receiving an input signal waveform; and characterization means coupled to the receiving means and responsive to the waveform for outputting a plurality of logic signals, the logic signals including: a first signal indicating when the waveform's differential amplitude is greater than zero; a second signal indicating when the waveform's derivative amplitude is greater than zero; a third signal indicating when the waveform's differential signal voltage is greater than a predetermined positive threshold; and a fourth signal indicating when the waveform's differential signal voltage is less than a predetermined negative threshold. ### Claim 9 (depends on 8) The system of claim 8, further comprising a logic circuit coupled to the characterization means, the logic circuit including: input means for receiving each of the plurality of logic signals; and detection means coupled to the input means for outputting a detection pulse when the logic signals indicate that the signal waveform contains a dibit. ### Claim 10 (depends on 9) The system of claim 9, wherein the logic circuit includes control input means for selectively turning off power to the logic circuit. ### Claim 11 (depends on 9) The system of claim 9, wherein the logic circuit includes control input means for selectively turning off power to the characterization means. ### Claim 12 A method of processing an input waveform comprising the steps of: (a) receiving the input waveform; (b) identifying when a differential amplitude of the input waveform is greater than zero volts including outputting an A.sub.-- POL signal; (c) identifying when a derivative amplitude of the input waveform is greater than zero volts including outputting a CPOL signal; (d) identifying when a differential signal voltage of the input waveform is greater than a preset positive threshold selected by a user including outputting a PCOMP signal; and (e) identifying when the differential signal voltage of the waveform is less than a preset negative threshold selected by a user including outputting a NCOMP signal. ### Claim 13 (depends on 12) The method of claim 12, further comprising the step of: (f) processing one or more of the signals output in the identification steps (b) through (e) including outputting a detection pulse when the processing indicates that a dibit is present in the waveform. ### Claim 14 (depends on 12) The method of claim 12, further comprising the step of: (g) processing one or more of the signals output in the identification steps (b) through (e) including identifying when (i) an individual valid peak is present in the waveform or (ii) a positive-to-negative dibit is present in the waveform or (iii) a negative-to-positive dibit is present in the waveform; and (h) receiving a control signal and, in response to the control signal, outputting a detection pulse whenever only one of (i) through (iii) is identified as present in the waveform.