# US 5,705,941 A · Output driver for use in semiconductor integrated circuit

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- Number: US 5,705,941 A
- Document ID: US5705941A
- Status: Granted
- Kind: A
- Application number: 08/452,465
- Filed: 1995-05-26
- Granted: 1998-01-06
- Earliest claimed: 1994-06-07
- Assignees: Motorola, Inc.
- Inventors: Hidetaka Fukazawa; Satoshi Sekine
- Web page: https://patentgrep.com/patent/US5705941A

## CPC

- H10D 89/811: {using FETs as protective elements}
- H03K 17/08122: {in field-effect transistor switches}
- H03K 19/00315: {in field-effect transistor circuits}
- H10W 72/90: Bond pads, in general
- H10W 90/754: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M)
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

An output driver that allows for static protection during generation of static discharge. The output driver includes a static protection circuit located between a predrive stage and a power drive stage.

## Claims

### Claim 1

An output driver for a semiconductor integrated circuit device, comprising:
a predriver stage for converting an input signal into a desired voltage to generate a power-drive-stage drive signal and applying it to a drive signal line; and a power drive stage for applying to a bonding pad an output signal corresponding to said power-drive-stage drive signal, said output driver including:
when a high voltage greater than a predetermined voltage value is applied to said drive signal line, a static protection circuit for connecting said drive signal line and a power-supply bus line to forcefully conduct the current induced by said high voltage applied thereto into said power-supply bus line.

### Claim 2 (depends on 1)

An output driver for a semiconductor integrated circuit device according to claim 1, wherein said static protection circuit comprises a P-channel MOS transistor having its source and drain terminals connected to a high-potential power supply line and said drive signal line, respectively, and an N-channel MOS transistor having its drain and source terminals connected to said drive signal line and a low-potential power supply line, respectively.

### Claim 3 (depends on 1)

An output driver for a semiconductor integrated circuit device according to claim 1, wherein said static protection circuit comprises an N-channel MOS transistor having its drain and source terminals connected to a high-potential power supply line and said drive signal line, respectively, and an N-channel MOS transistor having its drain and source terminals connected to said drive signal line and a low-potential power supply line.

### Claim 4 (depends on 1)

An output driver for a semiconductor integrated circuit device according to claim 1, wherein said static protection circuit comprises a disable buffer whose output is always coupled to a high-impedance node.

### Claim 5 (depends on 1)

An output driver for a semiconductor integrated circuit device according to claim 1, wherein said disable buffer is connected between an output of said predriver stage and the drive signal line.

### Claim 6

An output driver for a semiconductor integrated circuit device, comprising:
a predriver stage for converting an input signal into a desired voltage to generate a power-drive-stage drive signal and applying it to a drive signal line; and
a power drive stage for applying to a bonding pad an output signal corresponding to said power-drive-stage drive signal,
wherein a last-stage MOS transistor in said predriver stage comprises a metal wire connected to said drive signal line, a diffusion area on which a polysilicon gate wire is disposed, and a contact hole for connecting said metal wire and said diffusion area, and wherein said contact hole is formed away from an end face of said polysilicon gate wire over a distance greater than a minimum gate-to-contact hole distance specified by a layout design rule for said semiconductor integrated circuit device.

### Claim 7

An output driver capable of providing electrostatic discharge protection, comprising:
a predrive circuit having an input terminal and an output terminal;
a first protection circuit having first and second bias terminals and a drive node, wherein the output terminal of the predrive circuit is coupled to the drive node;
a drive stage having an input terminal and an output terminal, wherein the input terminal is coupled to the drive node; and
a second protection circuit having first and second bias terminals and a coupling node, wherein the output terminal of the drive stage is coupled to the coupling node.

### Claim 8 (depends on 7)

The output driver of claim 7, wherein the drive stage comprises a transistor having a control electrode, a first current carrying electrode, and a second current carrying electrode, wherein the control electrode serves as the input terminal of the drive stage and the first current carrying electrode serves as the output terminal of the drive stage.

### Claim 9 (depends on 7)

The output driver of claim 7, wherein the second current carrying electrodes of the first diode and the second diode are coupled a first bus and the first current carrying electrodes of the first diode and the second diode are coupled a second bus.

### Claim 10 (depends on 7)

The output driver of claim 7, wherein the predrive circuit comprises an inverter circuit.

### Claim 11 (depends on 7)

The output driver of claim 7, wherein:
the first diode is a P-channel field effect transistor having a gate electrode, a back-gate electrode, and first and second current carrying electrodes; and
the second diode an N-channel field effect transistor having a gate electrode, a back-gate electrode, and first and second current carrying electrodes, wherein the first current carrying electrode of the second diode is coupled to the first current carrying electrode of the first diode, and the second current carrying electrode, the gate electrode and the back-gate electrode of the second diode are commonly coupled.

### Claim 12 (depends on 11)

The output driver of claim 11, wherein the back-gate electrode of the first diode is commonly coupled to second current carrying electrode and to the control electrode of the first diode.

### Claim 13 (depends on 11)

The output driver of claim 11, wherein the second protection circuit comprises:
a third diode having an anode and a cathode; and
a fourth diode having an anode and a cathode, the anodes of the first and second diodes commonly coupled.

### Claim 14 (depends on 13)

The output driver of claim 13, wherein:
the third diode is a P-channel field effect transistor having a gate electrode, a back-gate electrode, and first and second current carrying electrodes; and
the fourth diode is an N-channel field effect transistor having a gate electrode, a back-gate electrode, and first and second current carrying electrodes, wherein the first current carrying electrode of the fourth diode is coupled to the first current carrying electrode of the third diode, and the second current carrying electrode, the gate electrode and the back-gate electrode of the fourth diode are commonly coupled.

### Claim 15 (depends on 14)

The output driver of claim 14, wherein the back-gate electrode of the first diode is commonly coupled to second current carrying electrode and to the gate electrode of the first diode, and wherein the back-gate electrode of the third diode is commonly coupled to second current carrying electrode and to the gate electrode of the third diode.

### Claim 16 (depends on 14)

The output driver of claim 14, wherein the back-gate electrode of the first diode, the gate electrode of the first diode, the back-gate electrode of the third diode, and the gate electrode of the third diode are coupled to a first bus.

### Claim 17 (depends on 13)

The output driver of claim 13, wherein the second current carrying electrodes of the first diode, the second diode, the third diode, and the fourth diode are coupled a first bus and the first current carrying electrodes of the first diode, the second diode, the third diode, and the fourth diode are coupled a second bus.
