# US 5,705,919 A · Low drop-out switching regulator architecture > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 5,705,919 A - Document ID: US5705919A - Status: Granted - Kind: A - Application number: 08/723,575 - Filed: 1996-09-30 - Granted: 1998-01-06 - Earliest claimed: 1996-09-30 - Assignees: Linear Technology Corporation - Inventors: Milton E. Wilcox - Web page: https://patentgrep.com/patent/US5705919A ## CPC - G05F 1/618: using semiconductor devices in series and in parallel with the load as final control devices (G05F1/461 takes precedence) - G05F: SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES ## Abstract Circuits and methods are provided for low drop-out operation of switching regulator circuits that include a switching transistor and an output circuit adapted to supply current at a regulated voltage to a load. The circuits and methods generate a limiting signal that allows the switching transistor to remain in a continuous conductive state for a predetermined number of oscillator cycles. The predetermined number of oscillator cycles is preferably set by a counter that initiates a signal that turns the switching transistor OFF. ## Claims ### Claim 1 A switching voltage regulator circuit comprising: a switch circuit coupled to a source of input voltage, said switch circuit comprising a first switching element coupled to a switch node; a driver circuit comprising a first driver coupled to said first switching element; an output circuit coupled to said switch circuit, said output circuit comprising an inductive storage element and a capacitive storage element coupled between an output terminal and ground; a control circuit that generates a control signal based at least in part on an oscillator signal from an oscillator circuit, said control circuit being coupled to said driver circuit to provide said control signal to said driver circuit; and a limiting circuit coupled to said control circuit to change the state of said control signal when said first switching element has been in a continuous conductive state for a predetermined number of oscillator cycles. ### Claim 2 (depends on 1) The switching voltage regulator circuit of claim 1, further comprising a second switching element coupled between said switch node and ground. ### Claim 3 (depends on 2) The switching voltage regulator circuit of claim 2, wherein said driver circuit further comprises a second driver coupled to said second switching element. ### Claim 4 (depends on 3) The switching voltage regulator circuit of claim 3, wherein said control circuit comprises: a pulse-width modulator controller that generates an output based at least in part on a feedback signal that corresponds to current flowing in said inductive storage element and a feedback signal that corresponds to voltage at said output terminal. ### Claim 5 (depends on 1) The switching voltage regulator circuit of claim 1, further comprising a second capacitive storage element coupled between a source of drive voltage and said switch node. ### Claim 6 (depends on 1) The switching voltage regulator circuit of claim 1 wherein said limiting circuit comprises: a counter having a clock input driven by said oscillator signal, a reset input and an output that changes state when said counter has counted a predetermined number of oscillator cycles, said counter being reset each time said first switching element is turned OFF; and a logic circuit coupled to said counter and said control circuit, said logic circuit changing the state of said control signal as a result of said output of said counter changing state. ### Claim 7 (depends on 6) The switching voltage regulator circuit of claim 6, wherein said logic circuit comprises: a flip-flop having a clock input driven by said oscillator signal and a signal input coupled to said output of said counter, said flip-flop having an output that changes from low to high when a high signal is at said signal input and said clock input is driven high by said oscillator signal; a first limiting circuit logic gate that inverts said oscillator signal; and a second limiting circuit logic gate having a first input coupled to said first gate and a second input coupled to said output of said flip-flop, said second gate producing an output signal that changes state when said first switching element has been in a continuous conductive state for a predetermined number of oscillator cycles. ### Claim 8 (depends on 1) The switching voltage regulator circuit of claim 1 wherein said first switching element is a MOSFET. ### Claim 9 (depends on 1) The switching voltage regulator circuit of claim 1, wherein said first switching element is coupled between said source of input voltage and said switch node. ### Claim 10 (depends on 1) The switching voltage regulator circuit of claim 1, wherein said inductive storage element is coupled between said switch node and said output terminal. ### Claim 11 (depends on 4) The switching voltage regulator circuit of claim 4, wherein said control circuit further comprises: a first control circuit logic gate with a first input coupled to said limiting circuit and a second input coupled to said output of said pulse-width modulator controller, said first control circuit logic gate producing a first control circuit logic gate signal; and a second control circuit logic gate coupled to said first control circuit logic gate, said second control circuit logic gate for inverting said first control circuit logic gate signal. ### Claim 12 (depends on 11) The switching voltage regulator circuit of claim 11, wherein said first driver comprises an input coupled to said second control circuit logic gate. ### Claim 13 (depends on 12) The switching voltage regulator circuit of claim 12, wherein said second driver comprises an input coupled to said first control circuit logic gate. ### Claim 14 (depends on 11) The switching voltage regulator circuit of claim 11, wherein said limiting circuit comprises: a counter having a clock input driven by said oscillator signal, a reset input and an output that changes state when said counter has counted a predetermined number of oscillator cycles, said counter being reset each time said first switching element is turned OFF; and a logic circuit coupled to said counter and said control circuit, said logic circuit changing the state of said control signal as a result of said output of said counter changing state. ### Claim 15 (depends on 14) The switching voltage regulator circuit of claim 14, wherein said logic circuit comprises: a flip-flop having a clock input driven by said oscillator signal and a signal input coupled to said output of said counter, said flip-flop having an output that changes from low to high when a high signal is at said signal input and said clock input is driven high by said oscillator signal; a first limiting circuit logic gate that inverts said oscillator signal; and a second limiting circuit logic gate having a first input coupled to said first gate and a second input coupled to said output of said flip-flop, said second gate producing an output signal that changes state when said first switching element has been in a continuous conductive state for a predetermined number of oscillator cycles. ### Claim 16 (depends on 3) The switching voltage regulator circuit of claim 3, wherein said second driver comprises a one-shot circuit. ### Claim 17 (depends on 1) The switching voltage regulator circuit of claim 1, further comprising a conducting element coupled between said switch node and ground, said conducting element conducting when said first switching element is OFF. ### Claim 18 (depends on 1) The switching voltage regulator circuit of claim 1, wherein said first switching element is coupled between said switch node and said output terminal. ### Claim 19 (depends on 1) The switching voltage regulator circuit of claim 1, wherein said inductive storage element is coupled between said source of input voltage and said switch node. ### Claim 20 (depends on 4) The switching voltage regulator circuit of claim 4, wherein said control circuit further comprises: a first control circuit logic gate with an input coupled to said output of said pulse-width modulator controller for inverting said output of said pulse-width modulator controller; a second control circuit logic gate with a first input coupled to said limiting circuit and a second input coupled to said first control circuit logic gate, said second control circuit logic gate producing a second control logic gate signal; and a third control circuit logic gate coupled to said second control circuit logic gate, said third control circuit logic gate for inverting said second control circuit logic gate signal. ### Claim 21 (depends on 20) The switching voltage regulator circuit of claim 20, wherein said first driver comprises an input coupled to said output of said third control circuit logic gate. ### Claim 22 (depends on 20) The switching voltage regulator circuit of claim 20, wherein said second driver comprises an input coupled to said output of said second control circuit logic gate. ### Claim 23 (depends on 20) The switching voltage regulator circuit of claim 20, wherein said limiting circuit comprises: a counter having a clock input driven by said oscillator signal, a reset input driven by said output of said third control circuit logic gate and an output that changes state when said counter has counted a predetermined number of oscillator cycles, said counter being reset each time said first switching element is turned OFF; and a logic circuit coupled to said counter and said control circuit, said logic circuit changing the state of said control signal as a result of a said counter output changing state. ### Claim 24 (depends on 23) The switching voltage regulator circuit of claim 23, wherein said logic circuit comprises: a flip-flop having a clock input driven by said oscillator signal, and a signal input coupled to said output of said counter, said flip-flop having an output that changes from low to high when a high signal is at said signal input and said clock input is driven high by said oscillator signal; a first limiting circuit logic gate that inverts said oscillator signal; and a second limiting circuit logic gate having a first input coupled to said first gate and a second input coupled to said output of said flip-flop, said second gate producing an output signal that changes state when said first switching element has been in a continuous conductive state for a predetermined number of oscillator cycles. ### Claim 25 A method for controlling a switching voltage regulator comprising the steps of: producing a first control signal based at least in part on an oscillator signal; applying said first control signal to a driver circuit, said driver circuit comprising a first driver that produces a first driver signal; driving with said first driver signal a switch circuit coupled to a source of input voltage, said switch circuit comprising a first switching element coupled to a switch node; providing a switch signal from said switch circuit to an output circuit that produces a regulated output signal; monitoring said regulated output signal; modifying said first control signal based at least in part on said regulated output signal; and combining said control signal with a limiting signal that allows said first switching element to be in a continuous conductive state for a predetermined number of oscillator cycles. ### Claim 26 (depends on 25) The method of claim 25, wherein: said driver circuit further comprises a second driver; said switch circuit further comprises a second switching element coupled between said switch node and ground and driven by said second driver; and said first switching element is coupled between said source of input voltage and said switch node. ### Claim 27 (depends on 25) The method of claim 25, wherein: said driver circuit further comprises a second driver that comprises a one-shot circuit; said switch circuit further comprises a second switching element coupled between said switch node and ground and driven by said second driver; and said first switching element is coupled between said source of input voltage and said switch node. ### Claim 28 (depends on 25) The method of claim 25, wherein: said driver circuit further comprises a second driver; said switch circuit further comprises a second switching element coupled between said switch node and ground and driven by said second driver; and said first switching element is coupled between said switch node and said output terminal.