# US 5,705,435 A · Chemical-mechanical polishing (CMP) apparatus > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 5,705,435 A - Document ID: US5705435A - Status: Granted - Kind: A - Application number: 08/694,727 - Filed: 1996-08-09 - Granted: 1998-01-06 - Earliest claimed: 1996-08-09 - Assignees: Industrial Technology Research Institute - Inventors: Lai-Tuh Chen - Web page: https://patentgrep.com/patent/US5705435A ## CPC - B24B 37/013: Devices or means for detecting lapping completion - B24B 37/042: {operating processes therefor} - B24B 49/12: involving optical means - H10P 74/23: {characterised by multiple measurements, corrections, marking or sorting processes} - H10P 95/062: {involving a dielectric removal step} - B24B: MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING (grinding of gear teeth B23F, of screw-threads B23G1/36; by electro-erosion B23H; abrasive or related blasting B24C; tools for grinding, buffing or sharpening B24D; polishing compositions C09G1/00; abrasives C09K3/14; electrolytic etching or polishing C25F3/00; grinding arrangements for use on assembled railway tracks E01B31/17); DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS - H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10 ## Abstract An improved and new apparatus and process for chemical-mechanical polishing (CMP) the surface of a semiconductor substrate to a planar condition has beed developed. The planarization endpoint, which is independent of topographic pattern density, is detected by monitoring the ratio of the rate of insulator material removal over a pattern feature to the rate of insulator material removal over an area without an underlying pattern feature. ## Claims ### Claim 1 An apparatus for planarizing semiconductor substrates comprising: a rotatable platen and polishing pad for chemical-mechanical polishing (CMP) an insulating layer deposited over a metallization pattern formed on the surface of a semiconductor substrate; a reservoir for a polishing slurry and means to dispense the slurry onto the polishing pad; a rotatable substrate carrier and means for holding the surface of the semiconductor substrate in juxtaposition relative to said rotatable platen and polishing pad with an applied pressure between the rotatable substrate carrier and the rotatable platen and polishing pad; a means to transfer the semiconductor substrate from the rotatable substrate carrier to an in-line cleaning station comprising a water spray nozzle and an air spray nozzle; a means to transfer the semiconductor substrate from the in-line cleaning station to an in-line optical thickness measurement tool; a means to align the semiconductor substrate in the in-line optical thickness measurement tool; a means to measure the thickness of the insulating layer over said metallization pattern before and after polishing; a means to measure the thickness of the insulating layer over said semiconductor substrate before and after polishing; a means to compute a first polish removal rate of said insulating layer over said metallization pattern; a means to compute a second polish removal rate of said insulating layer over said semiconductor substrate; a means of computing a polish removal rate ratio by dividing said first polish removal rate by said second polish removal rate; and a means to transfer the semiconductor substrate from the in-line optical thickness measurement tool to the rotatable substrate carrier for additional chemical-mechanical polishing (CMP) until said polish removal rate ratio is less than between about 0.9 to 1.1. ### Claim 2 (depends on 1) The apparatus of claim 1, wherein said rotatable platen and polishing pad are rotated at a speed between about 10 to 100 rpm. ### Claim 3 (depends on 1) The apparatus of claim 1, wherein said rotatable substrate carrier is rotated at a speed between about 10 to 100 rpm. ### Claim 4 (depends on 1) The apparatus of claim 1, wherein said applied pressure between the rotatable substrate carrier and the rotatable platen and polishing pad is between about 0.1 to 10 psi. ### Claim 5 (depends on 1) The apparatus of claim 1, wherein said polishing slurry comprises abrasive particles and a chemical etchant at a pH between about pH=9 to pH=14. ### Claim 6 (depends on 1) The apparatus of claim 1, wherein said metallization pattern comprises a metal island having length and width dimensions between about 50 to 1,000 .mu.m. ### Claim 7 (depends on 1) The apparatus of claim 1, wherein said metallization pattern has a thickness between about 3,000 to 8,000 Angstroms. ### Claim 8 (depends on 1) The apparatus of claim 1, wherein said insulating layer is silicon oxide. ### Claim 9 (depends on 1) The apparatus of claim 1, wherein the means to measure the thickness of the insulating layer over said metallization pattern is optical interferometry. ### Claim 10 (depends on 1) The apparatus of claim 1, wherein the means to measure the thickness of the insulating layer over said semiconductor substrate is optical interferometry. ### Claim 11 A method of chemical-mechanical polishing (CMP) a semiconductor substrate comprising: depositing a first insulating layer on said semiconductor substrate; forming a metallization pattern on said first insulating layer; conformally depositing a second insulating layer over said first insulating layer and said metallization pattern; measuring the thickness of said second insulating layer over said metallization pattern; measuring the combined thicknesses of said second insulating layer and said first insulating layer over said semiconductor substrate; performing chemical-mechanical polishing (CMP) of said second insulating layer; transferring said semiconductor substrate to an in-line cleaning station comprising a water spray nozzle and an air spray nozzle; removing the polishing slurry from the semiconductor substrate with water from said water spray nozzle; drying the semiconductor substrate with air from said air spray nozzle; transferring said semiconductor substrate to an in-line optical thickness measurement tool; aligning said semiconductor substrate in said in-line optical thickness measurement tool; remeasuring, after chemical-mechanical polishing (CMP), the thickness of said second insulating layer over said metallization pattern; remeasuring, after chemical-mechanical polishing (CMP), the combined thicknesses of said second insulating layer and said first insulating layer over said semiconductor substrate; computing a first polish removal rate of said second insulating layer over said metallization pattern; computing a second polish removal rate of said second insulating layer over said semiconductor substrate; computing a polish removal rate ratio by dividing said first polish removal rate by said second polish removal rate; and performing additional chemical-mechanical polishing (CMP) until said polish removal rate ratio is less than between about 0.9 to 1.1. ### Claim 12 (depends on 11) The method of claim 11, wherein said first insulating layer is silicon oxide. ### Claim 13 (depends on 12) The method of claim 12, wherein said silicon oxide is deposited using CVD (Chemical Vapor Deposition) processing, at a temperature between about 200.degree. to 450.degree. C., to a thickness between about 2,000 to 20,000 Angstroms. ### Claim 14 (depends on 11) The method of claim 11, wherein said metallization pattern comprises a metal island having length and width dimension between about 50 to 1,000 .mu.m. ### Claim 15 (depends on 14) The method of claim 14, wherein said metal island has a thickness between about 3,000 to 8,000 Angstroms. ### Claim 16 (depends on 14) The method of claim 14, wherein said metal island is aluminum. ### Claim 17 (depends on 14) The method of claim 14, wherein said metal island is aluminum-copper-silicon. ### Claim 18 (depends on 11) The method of claim 11, wherein said second insulating layer is silicon oxide. ### Claim 19 (depends on 18) The method of claim 18, wherein said silicon oxide is deposited using CVD (Chemical Vapor Deposition) processing, at a temperature between about 200.degree. to 450.degree. C., to a thickness between about 2,000 to 20,000 Angstroms. ### Claim 20 (depends on 11) The method of claim 11, wherein measuring the thickness of said second insulating layer over said metallization pattern is done by optical interferometry. ### Claim 21 (depends on 11) The method of claim 11, wherein measuring the combined thicknesses of said second insulating layer and said first insulating layer over said semiconductor substrate is done by optical interferometry. ### Claim 22 (depends on 11) The method of claim 11, wherein said chemical-mechanical polishing of said second insulating layer is performed using a polishing slurry containing abrasive particles and a chemical etchant, at a pH between about pH=9 to pH=14. ### Claim 23 (depends on 11) The method of claim 11, wherein remeasuring, after chemical-mechanical polishing, the thickness of said second insulating layer over said metallization pattern is done by optical interferometry. ### Claim 24 (depends on 11) The method of claim 11, wherein remeasuring, after chemical-mechanical polishing, the combined thicknesses of said second insulating layer and said first insulating layer over said semiconductor substrate is done by optical interferometry. ### Claim 25 A method of chemical-mechanical polishing (CMP) a semiconductor substrate comprising: depositing a first insulating layer on said semiconductor substrate; forming a metallization pattern on said first insulating layer; conformally depositing a second insulating layer over said first insulating layer and said metallization pattern; measuring the thickness of said second insulating layer over said metallization pattern; measuring the combined thicknesses of said second insulating layer and said first insulating layer over said semiconductor substrate; performing chemical-mechanical polishing (CMP) of said second insulating layer; transferring said semiconductor substrate to an in-line cleaning station comprising a water spray nozzle and an air spray nozzle; removing the polishing slurry from the semiconductor substrate with water from said water spray nozzle; drying the semiconductor substrate with air from said air spray nozzle; transferring said semiconductor substrate to an in-line optical thickness measurement tool; aligning said semiconductor substrate in said in-line optical thickness measurement tool; remeasuring, after chemical-mechanical polishing (CMP), the thickness of said second insulating layer over said metallization pattern; remeasuring, after chemical-mechanical polishing (CMP), the combined thicknesses of said second insulating layer and said first insulating layer over said semiconductor substrate; computing a first polish removal rate of said second insulating layer over said metallization pattern; computing a second polish removal rate of said second insulating layer over said semiconductor substrate; computing a polish removal rate ratio by dividing said second polish removal rate by said first polish removal rate; and performing additional chemical-mechanical polishing (CMP) until said polish removal rate ratio is greater than between about 0.9 to 1.1. ### Claim 26 (depends on 25) The method of claim 25, wherein said first insulating layer is silicon oxide. ### Claim 27 (depends on 25) The method of claim 25, wherein said silicon oxide is deposited using CVD (Chemical Vapor Deposition) processing, at a temperature between about 200.degree. to 450.degree. C., to a thickness between about 2,000 to 20,000 Angstroms. ### Claim 28 (depends on 25) The method of claim 25, wherein said metallization pattern comprises a metal island having length and width dimension between about 50 to 1,000 .mu.m. ### Claim 29 (depends on 28) The method of claim 28, wherein said metal island has a thickness between about 3,000 to 8,000 Angstroms. ### Claim 30 (depends on 28) The method of claim 28, wherein said metal island is aluminum. ### Claim 31 (depends on 28) The method of claim 28, wherein said metal island is aluminum-copper-silicon. ### Claim 32 (depends on 25) The method of claim 25, wherein said second insulating layer is silicon oxide. ### Claim 33 (depends on 32) The method of claim 32, wherein said silicon oxide is deposited using CVD (Chemical Vapor Deposition) processing, at a temperature between about 200.degree. to 450.degree. C., to a thickness between about 2,000 to 20,000 Angstroms. ### Claim 34 (depends on 25) The method of claim 25, wherein measuring the thickness of said second insulating layer over said metallization pattern is done by optical interferometry. ### Claim 35 (depends on 25) The method of claim 25, wherein measuring the combined thicknesses of said second insulating layer and said first insulating layer over said semiconductor substrate is done by optical interferometry. ### Claim 36 (depends on 25) The method of claim 25, wherein said chemical-mechanical polishing of said second insulating layer is performed using a polishing slurry containing abrasive particles and a chemical etchant, at a pH between about pH=9 to pH=14. ### Claim 37 (depends on 25) The method of claim 25, wherein remeasuring, after chemical-mechanical polishing, the thickness of said second insulating layer over said metallization pattern is done by optical interferometry. ### Claim 38 (depends on 25) The method of claim 25, wherein remeasuring, after chemical-mechanical polishing, the combined thicknesses of said second insulating layer and said first insulating layer over said semiconductor substrate is done by optical interferometry.