# US 5,704,059 A · Method of write to graphic memory where memory cells designated by plurality of addresses selected simultaneously for one row address are written

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- Number: US 5,704,059 A
- Document ID: US5704059A
- Status: Granted
- Kind: A
- Application number: 08/683,218
- Filed: 1996-07-18
- Granted: 1997-12-30
- Earliest claimed: 1995-07-28
- Assignees: NEC Corporation
- Inventors: Kazuki Ohno
- Web page: https://patentgrep.com/patent/US5704059A

## CPC

- G11C 7/00: Arrangements for writing information into, or reading information out from, a digital store (G11C5/00 takes precedence; auxiliary circuits for stores using semiconductor devices G11C11/4063, G11C11/413)
- G09G 5/393: Arrangements for updating the contents of the bit-mapped memory
- G11C 8/00: Arrangements for selecting an address in a digital store (for stores using transistors G11C11/407, G11C11/413)
- G11C: STATIC STORES (semiconductor memory devices H10B)
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)

## Abstract

In a method of write to a graphic memory where memory cells designated by a plurality of addresses selected simultaneously for one ROW address, the present method of write includes a first step of dividing the area corresponding to the column addresses designated by one row address of a memory cell array in to a plurality of segments each consisting of an arbitrary number of column addresses, a second step of designating a start address and an end address for each of the plurality of segments based on a first piece of information of column information, a third step of specifying the section designated by the start address and the end address as the candidate for the write object areas, and a fourth step of selecting segments having write object areas based on a second piece of information of the column address information, and writing specified data to the candidate for the write object areas of the segments having the write object areas.

## Claims

### Claim 1

A write method to a graphic memory comprising:
a first step of dividing the area corresponding to the column addresses designated by one row address of a memory cell array into a plurality of segments each consisting of an arbitrary number of column addresses;
a second step of designating a start address and an end address for each of said plurality of segments based on a first piece of information of column address information;
a third step of specifying the section designated by said start address and said end address as candidates for write object areas; and
a fourth step of selecting segments having write object areas based on a second piece of information of said column address information and writing specified data to said candidates for write object areas of segments having the write object areas.

### Claim 2 (depends on 1)

A write method to a graphic memory as claimed in claim 1, wherein said column address information comprises a column address for start address consisting of first bits and second bits and a column address for end address consisting of third bits and fourth bits and said start address and said end address are designated by said first bits and said third bits.

### Claim 3 (depends on 2)

A write method to a graphic memory as claimed in claim 2, wherein said second piece of information consists of said second bits and said fourth bits, segments are respectively designated by said second bits and said fourth bits, and the designated segments and the segments lying between these designated segments are specified as the segments having said write object areas.