# US 5,703,974 A · Semiconductor photonic integrated circuit and fabrication process therefor

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- Number: US 5,703,974 A
- Document ID: US5703974A
- Status: Granted
- Kind: A
- Application number: 08/680,290
- Filed: 1996-07-12
- Granted: 1997-12-30
- Earliest claimed: 1995-07-13
- Assignees: NEC Corporation
- Inventors: Tatsuya Sasaki; Takeshi Takeuchi
- Web page: https://patentgrep.com/patent/US5703974A

## CPC

- G02B 6/12004: {Combinations of two or more optical elements}
- H01S 5/026: Monolithically integrated components, e.g. waveguides, monitoring photo-detectors, drivers (stabilisation of output H01S5/06)
- G02B 2006/12121: {Laser}
- G02B 2006/12123: {Diode}
- G02B 2006/12195: {Tapering}
- H01S 5/0265: {Intensity modulators (intra-cavity modulators H01S5/0625)}
- H01S 5/06256: {with DBR-structure}
- H01S 5/2077: {using lateral bandgap control during growth, e.g. selective growth, mask induced}
- H01S 5/4025: {Array arrangements, e.g. constituted by discrete laser diodes or laser bar (H01S5/42 takes precedence)}
- H01S 5/50: Amplifier structures not provided for in groups H01S5/02 - H01S5/30
- G02B: OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- H01S: DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL

## Abstract

On a surface of an n-InP substrate, a mask of SiO.sub.2 layer wide in an active region and narrow in a passive region and having a constant gap width. In a waveguide region defined between the masks, a waveguide structure constituted of an n-InGaAsP guide layer, an undoped InGaAsP optical waveguide layer and a p-InP clad layer is selectively grown to form. Again, utilizing SiO.sub.2 layer, a mask is formed on the surface of the p-InP layer in the active region and a pair of masks defining the waveguide structure is formed in a the passive region, and high resistance InP layer is grown. Also, in the active region, a p-InP layer, a p-InGaAs contact layer are selectively grown. By forming SiO.sub.2, a window is formed to form p-side electrode. An n-type electrode is formed on the back surface of the substrate, By this, a device having an optical loss in the active region and passive region becomes low, a coupling coefficient between both regions is high. Also, an element capacitance can become small to enable high speed operation.

## Claims

### Claim 1

A semiconductor photonic integrated circuit comprising:
a first conductive type semiconductor substrate having first region and a second region on the surface thereof;
a first optical waveguide layer formed in mesa form on said first region of said first conductivity type semiconductor substrate;
a second optical waveguide layer formed continuously with said first optical waveguide layer, of a material having larger bandgap energy than said first optical waveguide layer within said second region on said first conductivity type semiconductor substrate;
a high resistance semiconductor layer covering a side surface of said first optical waveguide layer and an upper surface of said second optical waveguide layer; and
a second conductivity type semiconductor layer covering an upper surface of said first optical waveguide.

### Claim 2 (depends on 1)

A semiconductor photonic integrated circuit as set forth in claim 1, wherein said second optical waveguide is formed into a mesa form having width substantially equal to that of said first optical waveguide or a width gradually reducing from a substantially equal width to that of said first optical waveguide, and a side surface of said second optical waveguide layer is covered with said high resistance semiconductor layer.

### Claim 3 (depends on 1)

A semiconductor photonic integrated circuit as set forth in claim 1, wherein said high resistance semiconductor layer is formed of one of materials selected among a group of an undoped semiconductor, a semiconductor having accepter concentration of less than or equal to 5.times.10.sup.17 cm.sup.-3 and a semiconductor doped with Fe, Cr, Ti or Co.

### Claim 4 (depends on 1)

A semiconductor photonic integrated circuit as set forth in claim 1, wherein said first and second optical waveguide layer has a quantum well structure.

### Claim 5 (depends on 2)

A semiconductor photonic integrated circuit as set forth in claim 2, wherein said high resistance semiconductor layer is formed of one of materials selected among a group of an undoped semiconductor, a semiconductor having accepter concentration of less than or equal to 5.times.10.sup.17 cm.sup.-3 and a semiconductor doped with Fe, Cr, Ti or Co.

### Claim 6 (depends on 2)

A semiconductor photonic integrated circuit as set forth in claim 2, wherein said first and second optical waveguide layer has a quantum well structure.