# US 5,703,759 A · Multi-chip electrically reconfigurable module with predominantly extra-package inter-chip connections

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- Number: US 5,703,759 A
- Document ID: US5703759A
- Status: Granted
- Kind: A
- Application number: 08/569,032
- Filed: 1995-12-07
- Granted: 1997-12-30
- Earliest claimed: 1995-12-07
- Assignees: Xilinx, Inc.
- Inventors: Stephen M. Trimberger
- Web page: https://patentgrep.com/patent/US5703759A

## CPC

- H05K 7/1459: {Circuit configuration, e.g. routing signals}
- G06F 13/409: {Mechanical coupling (back panels H05K7/1438)}
- H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

An electrically reconfigurable multi-chip module (MCERD) comprises three electrically reconfigurable integrated circuits (ERICs) enclosed in a package. The package provides for more "extra-package" connections between the ERICs and package pins than it does "intra-package" inter-chip connections. However, configuration connections between ERICs are intra-package. The MCERD is mounted on a daughterboard which provides connections between package pins and between package pins and pins of the daughterboard. The connections between package pins define "extra-package inter-chip" connections that typically far exceed the number of intra-package inter-chip connections. The connections between package pins and daughterboard pins connect the MCERD to a host system when the daughterboard is mounted on the host system motherboard. When the MCERD and daughterboard are installed in a host system, the MCERD can be electrically configured and then operated as configured. A feature of this MCERD is that a system developer can configure the inter-chip connections by appropriate design of the daughterboard.

## Claims

### Claim 1

An assembly comprising:
plural electrically reconfigurable integrated circuits, each of said electrically reconfigurable integrated circuits having plural input-output nodes; and
a package for enclosing and providing interfacing for said electrically reconfigurable integrated circuits, said package including plural conductive interface elements for external interfacing of said electrically reconfigurable integrated circuits, said package providing intra-package connections between said electrically reconfigurable integrated circuits by electrically connecting predetermined respective ones of their input-output nodes to each other, said package providing for extra-package connections by electrically connecting predetermined ones of said input-output nodes to respective ones of said conductive interface elements, the number of said input-output nodes in said extra-package connections exceeding the number of said input-output nodes in said intra-package connections.

### Claim 2 (depends on 1)

An assembly as recited in claim 1 wherein the number of said input-output nodes in said extra-package connections is at least an order of magnitude greater than the number of said input-output nodes in said intra-package connections.

### Claim 3 (depends on 1)

An assembly as recited in claim 1 further comprising a circuit board on which said package is mounted, said circuit board providing inter-chip extra-package connections from at least some of said extra-package connections by electrically connecting pairs of said conductive elements, the number of said input-output nodes in said inter-chip extra-package connections exceeding the number of said input-output nodes in said intra-package connections.

### Claim 4 (depends on 3)

An assembly as recited in claim 3 wherein said circuit board is a daughterboard for providing electrical and physical interfacing between said package and a host system including a motherboard so that at least some of said input-output nodes in said extra-package connections are connected to said host system.

### Claim 5 (depends on 1)

An assembly as recited in claim 1 wherein said intra-package connections collectively include a series of cascade configuration connections that are successively activated during configuration of said electrically reconfigurable integrated circuits.

### Claim 6 (depends on 5)

An assembly as recited in claim 5 wherein said electrically reconfigurable integrated circuits include configuration memory, said cascade configuration connections being arranged to provide configuration data for storage in said configuration memory.

### Claim 7 (depends on 1)

An assembly as recited in claim 1 wherein each of said electrically configurable integrated circuits has alternative operating and configuration modes, said intra-package connections conveying information only during said configuration mode.

### Claim 8

A method comprising the steps of:
assembling a module with a package having plural conductive interface elements and enclosing plural electrically reconfigurable integrated circuits, each with multiple input-output nodes, so that said package provides intra-package connections between pairs of said electrically reconfigurable integrated circuits by electrically connecting predetermined respective ones of their input-output nodes to each other, so that said package provides for extra-package connections by electrically connecting predetermined ones of said input-output nodes to respective ones of said conductive interface elements, and so that the number of said input-output nodes in said extra-package connections exceed the number of said input-output nodes in said intra-package connections.

### Claim 9 (depends on 8)

A method as recited in claim 8 wherein said assembling step is performed so that the number of said input-output nodes in said extra-package connections is at least an order of magnitude greater than the number of said input-output nodes in said intra-package connections.

### Claim 10 (depends on 8)

A method as recited in claim 8 further comprising a step of mounting said module on a circuit board that provides inter-chip extra-package connections from at least some of said extra-package connections by electrically connecting pairs of said conductive interface elements so that the number of said input-output nodes in said inter-chip extra-package connections exceeds the number of said input-output nodes in said intra-package connections.

### Claim 11 (depends on 10)

A method as recited in claim 10 further comprising a step of mounting said circuit board on a motherboard of a host system so that at least some of said input-output nodes in said extra-package connections are electrically connected to said host-system.

### Claim 12 (depends on 8)

A method as recited in claim 8 further comprising the steps of:
electrically configuring said electrically reconfigurable integrated circuits by supplying configuration data to said electrically configurable integrated circuits along at least one of said extra-package connections; and
operating said electrically reconfigurable integrated circuits.

### Claim 13 (depends on 8)

A method as recited in claim 8 wherein, in said electrically configuring step, said electrically reconfigurable integrated circuits are serially activated for configuration by transmitting signals along a series of cascade configuration connections of said intra-package connections.