# US 5,703,586 A · Digital-to-analog converter having programmable transfer function errors and method of programming same

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- Number: US 5,703,586 A
- Document ID: US5703586A
- Status: Granted
- Kind: A
- Application number: 08/568,453
- Filed: 1995-12-07
- Granted: 1997-12-30
- Earliest claimed: 1995-12-07
- Assignees: Analog Devices, Inc.
- Inventors: Hans Juergen Tucholski
- Web page: https://patentgrep.com/patent/US5703586A

## CPC

- H03M 1/1047: {using an auxiliary digital/analogue converter for adding the correction values to the analogue signal (H03M1/1052 takes precedence)}
- H03M 1/687: {Segmented, i.e. the more significant bit converter being of the unary decoded type and the less significant bit converter being of the binary weighted type}
- H03M 1/745: {with weighted currents}
- H03M 1/747: {with equal currents which are switched by unary decoded digital signals}
- H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C)

## Abstract

A Digital-to-Analog (D/A) converter with programmable transfer function includes a Main Converter and at least one Sub-Converter. Errors in the Main Converter are compensated for by programming the one or more Sub-Converters with compensation values determined during a Calibration Sequence. The Calibration Sequence measures the deviations of the transfer function of the Main Converter from the ideal at predetermined bit transitions of the digital input signal and generates representative separate digital signals for the one or more Sub-Converters. By combining these separate signals with the digital input signal, the net errors of the D/A Converter transfer function are reduced.

## Claims

### Claim 1

A digital-to-analog converter with programmable transfer function errors for providing accuracy and resolution improvements, comprising:
first current-steering converter means responsive to first digital data signals and having predetermined transfer function errors,
second current-steering converter means responsive to second digital data signals and having transfer function errors less than implied by the combined resolution of said first and said second digital data signals,
a plurality of current-steering converter means responsive to a plurality of separate digital data signals and having transfer function errors of less than those of said second current-steering converter means,
memorizing means for said plurality of separate digital data signals,
resistive means, having a predetermined number of terminals connected to the outputs of said first, said second and said plurality of current-steering converter means and providing a digital-to-analog voltage output between two of said number of terminals,
calibration means determining said plurality of separate digital data signals in a manner to program the transfer function of said first current-steering converter means for the purpose of reducing transfer function errors of said digital-to-analog converter voltage output to less than implied by the combined resolution of said first and said second digital data signals,
digital data signal control means operatively controlling said first and said second current-steering converter means in response to said first and second digital data signals and further operatively controlling said plurality of current-steering converter means by selectively accessing said memorizing means for said plurality of separate digital data signals.

### Claim 2

A digital-to-analog converter with programmable transfer function errors for providing accuracy and resolution improvements, comprising:
first current-steering converter means responsive to first digital data signals and having predetermined transfer function errors,
second current-steering converter means responsive to second digital data signals and having transfer function errors less than implied by the combined resolution of said first and said second digital data signals,
third current-steering converter means responsive to third digital data signals and having transfer function errors of less than those of said second current-steering converter means,
memorizing means for said third digital data signals,
resistive means, having a predetermined number of terminals connected to the outputs of said first, said second and said third current-steering converter means and providing a digital-to-analog voltage output between two of said number of terminals,
calibration means determining said third digital data signals in a manner to program the transfer function of said first current-steering converter means for the purpose of reducing transfer function errors of said digital-to-analog converter voltage output to less than implied by the combined resolution of said first and second digital data signals,
digital data signal control means operatively controlling said first and said second current-steering converter means in response to said first and said second digital data signals and further operatively controlling said third current-steering converter means by selectively accessing said memorizing means for said third digital data signals.

### Claim 3 (depends on 1)

A digital-to-analog converter with programmable transfer function errors according to claim 1, wherein the calibration means comprises:
a voltage storage means,
a comparison means having an input and a digital output and consisting of amplification means and switch means,
digital means to provide said plurality of digital data signals in response to the state of said digital output of said comparison means,
digital control means to selectively transfer said plurality of digital data signals to said memorizing means.

### Claim 4 (depends on 2)

A digital-to-analog converter with programmable transfer function errors according to claim 2, wherein the calibration means comprises:
a voltage storage means,
a comparison means having an input and a digital output and consisting of amplification means and switch means,
digital means to provide said third digital data signals in response to the state of said digital output of said comparison means,
digital control means to selectively transfer said third digital data signals to said memorizing means.

### Claim 5 (depends on 1, 2, 3, 4)

A digital-to-analog converter with programmable transfer function errors according to claims 1, 2, 3 or 4, comprising:
fourth converter means responsive to fourth digital data signals representing an increase of the combined resolution of said first and second digital data signals for the purpose of providing a digital-to-analog converter voltage output with increased resolution,
digital data signal control means, operatively controlling said fourth current-steering converter means in response to said fourth digital data signals.

### Claim 6 (depends on 1, 2, 3, 4)

A digital-to-analog converter with programmable transfer function errors according to claims 1,2, 3 or 4, wherein the resistive means consists of a resistive element exhibiting a resistance of R, connected between a digital-to-analog converter output terminal and the non-terminated terminal of a R-2R ladder network composed of resistive elements exhibiting a resistance of R and having a predetermined number of terminals.

### Claim 7 (depends on 1, 2, 3, 4)

A digital-to-analog converter with programmable transfer function errors according to claims 1, 2, 3 or 4, wherein the resistive means consists of a resistive element exhibiting a resistance of a predetermined value, connected between a digital-to-analog converter output terminal and the non-terminated terminal of a R-2R ladder network composed of resistive elements exhibiting a resistance of R and having a predetermined number of terminals.

### Claim 8 (depends on 1, 2, 3, 4)

A digital-to-analog converter with programmable transfer function errors according to one of claims 1, 2, 3 or 4, wherein the resistive means consists of a resistive element exhibiting a resistance of a predetermined value, connected between a digital-to-analog converter output terminal and a network of resistive elements connected in series, each said resistive element exhibiting predetermined resistance, and said network having a predetermined number of terminals.

### Claim 9 (depends on 1, 2, 3, 4)

A method by which the transfer function errors of a Digital-to-Analog Converter according to claims 1, 2, 3 or 4, are reduced, the method comprising the steps of:
receiving a first digital data signal and converting it to a first output;
memorizing said first output;
receiving a second digital data signal and converting it to a second output;
measuring a deviation between said memorized first output and said second output;
adjusting said second digital data signal in response to said measured deviation and converting it to an adjusted second output at which said measured deviation is substantially at a minimum;
memorizing said adjusted second digital data signal; and
selectively accessing said memorized adjusted second digital data signal in response to a Digital-to-Analog Converter digital input signal.

### Claim 10

A Digital-to-Analog Converter with programmable transfer function errors having a digital data input signal, the Converter comprising:
a Main-Converter receiving a digital data input signal and producing an output current responding to said digital data input signal, the Main-Converter output current having a first range at a first resolution with predetermined transfer function errors;
a predetermined number of Sub-Converters each responding to one of a predetermined number of computed digital signals and each Sub-Converter producing output currents in response to said computed digital signals, the output current of each Sub-Converter having a range smaller than said first range at a resolution finer than said first resolution with transfer function errors smaller than implied by said first resolution;
a resistor network having input terminals connected to receive the Main-Converter output current and any Sub-Converter output currrent and having two output terminals; and
a Calibration circuit connected to the output terminals of the Resistor Network and connected to the digital data input signal and providing the computed digital signals for each Sub-Converter.

### Claim 11 (depends on 10)

The converter of claim 10, wherein the calibration circuit further comprises:
means for measuring an error at the output terminals of the resistor network;
means for converting said measured errors to digital calibration data signals;
means for memorizing said digital calibration data signals;
means responsive to the digital data input signals for accessing said digital calibration signals to produce the computed digital signals for each of the predetermined number of Sub-Converters.

### Claim 12 (depends on 10, 11)

A method by which the transfer function errors of a Digital-to-Analog Converter according to claim 10 or 11 are reduced, the method comprising the steps of:
receiving a first digital data input signal and converting a Main-Converter first output current producing a first output voltage;
memorizing said first output voltage;
receiving a second digital data input signal and converting a Main-Converter second output current;
receiving one of a predetermined number of computed digital signals for one of a predetermined number of Sub-Converters and converting a Sub-Converter first output current;
combining the Main-Converter second output current with the Sub-Converter first output current and converting the combined output currents to a second output voltage;
measuring a deviation between said memorized first output voltage and said second output voltage;
adjusting said computed digital signal in response to said measured deviation and converting it to a Sub-Converter adjusted first output current at which said measured deviation between said memorized first output voltage and the adjusted second output voltage obtained from conversion of said Main-Converter second output current combined with a Sub-Converter adjusted first output current is substantially at a minimum;
memorizing said adjusted computed digital signal; and
selectively accessing said memorized adjusted computed signal in response to the digital input data signal.