# US 5,703,531 A · Predistortion linearizer and method employing uniplanar Magic T hybrids > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 5,703,531 A - Document ID: US5703531A - Status: Granted - Kind: A - Application number: 08/703,166 - Filed: 1996-08-28 - Granted: 1997-12-30 - Earliest claimed: 1995-06-07 - Assignees: Hughes Aicraft Company - Inventors: Steven A. Vaughn; James A. Verkade - Web page: https://patentgrep.com/patent/US5703531A ## CPC - H03F 1/3241: {using predistortion circuits (H03F1/3211, H03F1/3217 take precedence)} - H03F 2200/198: A hybrid coupler being used as coupling circuit between stages of an amplifier circuit - H03F: AMPLIFIERS ## Abstract Operating on the principle of vector summation, a predistortion linearizer includes a signal divider on one side of a substrate plate that divides a microwave signal into a linear portion and a nonlinear portion. Signal energy on both the nonlinear and linear portions is coupled into two respective slotline transmission lines on the substrate by uniplanar Magic T hybrids. As the signals are transmitted along the slotlines, their relative amplitudes and phases are adjusted to introduce a distortion inverse to that expected in a subsequent amplification. The linear portion and nonlinear portion pass through another pair of baluns. The signals are then combined by an in-phase summation on the same side of the plate as the input signal divider. ## Claims ### Claim 1 A predistortion linearizer, comprising: a dielectric plate substrate having a metallic layer on a single side thereof, the plate having a longitudinal axis lying in the plane of the plate and a transverse axis lying in the plane of the plate and perpendicular to the longitudinal axis, there being a first transverse direction and an oppositely disposed second transverse direction perpendicular to the longitudinal axis; a signal divider on a top side of the plate substrate, the signal divider having a signal divider input, a signal divider output first leg parallel to the longitudinal axis, and a signal divider output second leg parallel to the longitudinal axis; a signal combiner on the top side of the plate substrate, the signal combiner having a signal combiner input first leg parallel to the longitudinal axis, a signal combiner input second leg parallel to the longitudinal axis, and a signal combiner output; a first slotline formed in the metallic layer on the top side of the plate substrate, the first slotline representing the signal divider output first leg in the first transverse direction and representing the signal combiner input first leg in the first transverse direction; a second slotline formed in the metallic layer on the top side of the plate substrate, the second slotline representing the signal divider output second leg in the second transverse direction and representing the signal combiner input second leg in the first transverse direction; and means for adjusting the relative phase and amplitude of signals transmitted along the first slotline and the second slotline. ### Claim 2 (depends on 1) The predistortion linearizer of claim 1, wherein the signal divider comprises uniplanar a Magic T power divider and the signal combiner comprises uniplanar a Magic T power divider. ### Claim 3 (depends on 1) The predistortion linearizer of claim 1, wherein the means for adjusting comprises a first means for adjusting the phase and amplitude of a first signal transmitted along the first slotline, and a second means for adjusting the phase and amplitude of a second signal transmitted along the second slotline. ### Claim 4 (depends on 1) The predistortion linearizer of claim 1, wherein the means for adjusting comprises a Schottky limiter diode and a PIN diode attenuator. ### Claim 5 (depends on 1) The predistortion linearizer of claim 1, wherein the means for adjusting comprises a first Schottky limiter diode pair and a first PIN diode pair coupled to the first slotline, and a second Schottky limiter diode pair and a second PIN diode pair coupled to the second slotline. ### Claim 6 (depends on 1) The predistortion linearizer of claim 1, wherein the dielectric plate substrate is made of aluminum oxide and the metallic layer is made of gold. ### Claim 7 A predistortion linearizer, comprising: a dielectric plate substrate having a metallic layer on a top side thereof; a linearizer signal input and a linearizer signal output on a top side of the plate substrate; a signal divider on the top side of the plate substrate, the signal divider having a signal divider input in electrical communication with the linearizer signal input, a signal divider output first leg, and a signal divider output second leg; a signal combiner on the top side of the plate substrate, the signal combiner having a signal combiner input first leg, a signal combiner input second leg, and a signal combiner output in electrical communication with the linearizer signal output; a first slotline formed through the metallic layer on the top side of the plate substrate and extending from a first slotline first end in registry with the signal divider output first leg to a first slotline second end in registry with the signal combiner input first leg; a second slotline formed through the metallic layer on the top side of the plate substrate and extending from a second slotline first end in registry with the signal divider output second leg to a second slotline second end in registry with the signal combiner input second leg; and means for adjusting the relative phase and amplitude of signals transmitted along the first slotline and the second slotline. ### Claim 8 (depends on 7) The predistortion linearizer of claim 7, wherein each of the first slotline first end registry with the signal divider output first leg, the first slotline second end registry with the signal combiner input first leg, the second slotline first end registry with the signal divider output second leg, and the second slotline second end registry with the signal combiner input second leg comprises a collinear registry. ### Claim 9 (depends on 7) The predistortion linearizer of claim 7, wherein the sense of registries are selected such that one of the first slotline and the second slotline achieves no phase reversal of a signal transmitted along the slotline and the other of the first slotline and the second slotline achieves a 180.degree. phase reversal of a signal transmitted along the slotline. ### Claim 10 (depends on 7) The predistortion linearizer of claim 7, wherein the first slotline reaches registry from the same sides of the signal divider output first leg and the signal combiner input first leg, and wherein the second slotline reaches registry from opposite sides of the signal divider output second leg and the signal combiner input second leg. ### Claim 11 (depends on 7) The predistortion linearizer of claim 7, wherein the signal divider comprises a Magic T power divider and the signal combiner comprises a Magic T power divider. ### Claim 12 (depends on 7) The predistortion linearizer of claim 7, wherein the means for adjusting comprises a first means for adjusting the phase and amplitude of a first signal transmitted along the first slotline, and a second means for adjusting the phase and amplitude of a second signal transmitted along the second slotline. ### Claim 13 (depends on 7) The predistortion linearizer of claim 7, wherein the means for adjusting comprises a Schottky limiter diode and a PIN diode attenuator. ### Claim 14 (depends on 7) The predistortion linearizer of claim 7, wherein the means for adjusting comprises a first Schottky limiter diode pair and a first PIN diode pair coupled to the first slotline, and a second Schottky limiter diode pair and a second PIN diode pair coupled to the second slotline. ### Claim 15 (depends on 7) The predistortion linearizer of claim 7, wherein the dielectric plate substrate is made of aluminum oxide and the metallic layer is made of gold. ### Claim 16 A method of performing a predistortion linearization of a signal, comprising the steps of: providing a planar substrate having a first slotline and a second slotline thereon; dividing the signal into a linear portion and a nonlinear portion using a Magic T power divider; transmitting the linear portion along the first slotline; transmitting the nonlinear portion along the second slotline; adjusting the relative phase and amplitude of the linear portion and the nonlinear portion as they are transmitted along the first slotline and the second slotline; and combining the linear portion and the nonlinear portion 180.degree. out of phase. ### Claim 17 (depends on 16) The method of claim 16 of performing a predistortion linearization wherein the step of combining comprises using a Magic T power combiner. ### Claim 18 (depends on 16) The method of claim 16, wherein the step of providing a planar substrate includes the step of providing the Magic T power divider on the planar substrate.