# US 5,703,526 A · Circuit for detecting the locked condition of PSK or QAM demodulators

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- Number: US 5,703,526 A
- Document ID: US5703526A
- Status: Granted
- Kind: A
- Application number: 08/675,632
- Filed: 1996-07-01
- Granted: 1997-12-30
- Earliest claimed: 1995-07-06
- Assignees: SGS-Thomson Microelectronics S.A.
- Inventors: Jacques Meyer
- Web page: https://patentgrep.com/patent/US5703526A

## CPC

- H04L 27/3827: {in which the carrier is recovered using only the demodulated baseband signals}
- H04L 27/2273: {associated with quadrature demodulation, e.g. Costas loop}
- H04L 2027/0057: {quadrature phase}
- Y10S 331/02: Phase locked loop having lock indicating or detecting means
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)
- Y10S: TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS

## Abstract

A method for detecting a locked condition of a demodulator of at least one signal that may have discrete levels defining a constellation of nominal points in a plane. The method includes the steps of defining reference areas about the nominal points, a reference area being separated from another by a band or an angular sector crossing the origin of the constellation plane, and indicating a locked condition if the ratio of points occurring in the reference areas is above the probability for points to occur in the reference areas when the demodulator is wrongly adjusted.

## Claims

### Claim 1

A method for detecting a locked condition of a demodulator of QPSK signals that may have discrete levels defining a constellation of four nominal points in a plane, including the steps of:
defining reference areas about the nominal points, a reference area being defined between two lines crossing the origin of the constellation plane; and
indicating a locked condition if a ratio of points occurring in the reference areas is above a probability for points to occur in the reference areas when the demodulator is wrongly adjusted;
wherein said lines are in the number of four with respective slopes of 2, 1/2, -1/2, and -2.

### Claim 2

A circuit for detecting a locked condition of a QPSK demodulator, including:
two absolute value circuits respectively receiving two quadrature demodulated signals;
a circuit for providing a maximum value and a minimum value of the outputs of the two absolute value circuits;
means for enabling a counter according to a sign of a difference between the maximum value and a product of a minimum value and a factor higher than 1; and
means for asserting a lock indication signal when the content of the counter reaches a predetermined value.

### Claim 3 (depends on 2)

The circuit of claim 2, wherein the counter is an up/down counter having a counting mode selected by said sign and whose highest significant bit constitutes the lock indication signal.