# US 5,703,520 A · Integrated inductive load snubbing device using a multi-collector transistor

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- Number: US 5,703,520 A
- Document ID: US5703520A
- Status: Granted
- Kind: A
- Application number: 08/617,705
- Filed: 1996-04-01
- Granted: 1997-12-30
- Earliest claimed: 1996-04-01
- Assignees: Delco Electronics Corporation
- Inventors: John Mark Dikeman; Mark Wendell Gose
- Web page: https://patentgrep.com/patent/US5703520A

## CPC

- H10D 89/713: {including a PNP transistor and a NPN transistor, wherein each of said transistors has its base region coupled to the collector region of the other transistor, e.g. silicon controlled rectifier [SCR] devices}
- H03K 17/0814: by measures taken in the output circuit
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M)

## Abstract

A transient suppressor comprises a self-triggered silicon control rectifier (SCR) that forms a drive circuit for an NPN power transistor. The SCR and the NPN power transistor are combined, along with other elements, into an integrated circuit (IC) by a junction isolated BiCMOS process. The SCR self-triggers upon being subjected to an inductive flyback condition created by an inductive load and renders the NPN transistor conductive, thereby allowing the NPN power transistor, having a relatively large semiconductor region, to effectively snub the current created by the negative feedback condition. The transient suppressor may be used in either a high-side or low-side driver arrangement and the SCR/NPN power transistor combination may further be combined with load driving and other circuitry on a single integrated circuit. The IC is designed to perform normally when subjected to transient conditions and further when there exists a potential voltage differential between the circuit ground and the load ground of at least 2 volts.

## Claims

### Claim 1

An inductive load snubbing device comprising:
a PNP transistor having an emitter defining a first terminal of the device, a base, and a collector; and
an NPN transistor having an emitter defining a second terminal of the device, a base connected to the collector of said PNP transistor, a first collector connected to the base of said PNP transistor and a second collector connected to the emitter of said PNP transistor;
wherein the second collector, base and emitter of said NPN transistor form a power transistor, and wherein the emitter, base and collector of said PNP transistor, and the emitter of said NPN transistor form an SCR for driving the power transistor.

### Claim 2 (depends on 1)

The device of claim 1 further including a resistance established between the emitter and collector of said PNP transistor, said resistance having a value sufficient to render the SCR self-triggering.

### Claim 3 (depends on 2)

The device of claim 2 wherein said first terminal is connected to ground potential;
and wherein said second terminal is connectable to an inductive load.

### Claim 4 (depends on 2)

The device of claim 2 wherein said first terminal is connected to a first end of an inductive load;
and wherein said second terminal is connected to a second opposite end of the inductive load;
and wherein load current flows through the inductive load in a direction from said first end toward said second opposite end.

### Claim 5 (depends on 1)

The device of claim 1 wherein the device is formed of a single integrated circuit.